MainWindow 0 0 841 1010 false Developed Hardware Ui 10 0 821 391 75 true true false false ArrowCursor 4 Manual Operation 10 10 801 141 0 0 0 130 16777215 150 75 true true false false Register Rd/Wr 360 40 171 80 50 true false false false Access registers by: 10 50 131 23 50 true false false false Register offset 10 30 141 23 50 true false false false Register number 550 70 187 31 50 true false false false Transaction width: 50 true false false false 16 32 64 20 30 311 101 0 50 true false false false Offset (Hex): 0 0 50 true false false false 32767 6 7 50 true false false false Bar: 50 true false false false 0 1 2 50 true false false false Value (Hex): true 16777215 16777215 50 true false false false 50 true false false false Write 0 0 50 true false false false Result (Hex): 50 true false false false QFrame::Box QFrame::Sunken QLCDNumber::Hex 0 0 50 true false false false Read 10 260 631 91 0 0 0 0 16777215 150 75 true true false false false Slave Programming 10 30 611 27 50 true false false false false Bit file: 50 true false false false false 50 true false false false false Browse... 10 60 148 21 50 true false false false false Programming: 50 true false false false false doing 510 60 111 23 75 true Program Bit 260 61 221 21 10 160 801 91 0 0 0 0 16777215 150 75 true true false false false Flash Command 10 30 641 27 50 true false false false false Bin file: 50 false Qt::ClickFocus 50 true false false false false Browse... 10 60 102 21 50 true false false false false Writing: 50 true false false false false doing 430 60 111 23 75 true Write Bin 200 60 221 21 680 30 121 52 Read Bin 50 true false false false false Reading: 50 true false false false false doing 560 60 101 25 <html><head/><body>Select Flash</body></html> Spi Flash Bpi Flash 670 280 121 23 50 false GT reset/read 670 320 111 23 statusLog/s Scen Player 450 200 361 101 75 true true false false Manual ATgc 10 50 37 15 50 true false false false Mode: 50 50 79 23 50 true false false false Auto Manual 140 50 38 15 50 true false false false Value: 180 50 71 23 50 true false false false 260 50 80 23 50 true false false false Set ATgc 10 200 321 101 75 true true false false Afe Regs Ctrl 0 50 71 23 50 true false false false <html><head/><body>Slave FPGA Select</body></html> Slave0 Slave1 Slave2 80 50 71 23 50 true false false false <html><head/><body>AFE Register Address (hex)</body></html> 160 50 80 23 50 true false false false Read 250 20 71 81 50 true false false false <html><head/><body>AFE0AFE1AFE2AFE3</body></html> true 10 10 801 181 0 0 0 105 16777215 200 75 true true false false false Scenario Command 10 30 781 31 50 true false false false false Scenario Files Path: 50 true false false false false 50 true false false false false Browse... 690 70 106 52 75 true true false false false Set Scenario 50 true false false false false Filling: 50 true false false false false doing 440 70 235 102 50 true false false false false Scenario Verification 70 15 50 true false false false false Sram Bin Creating: 50 true false false false false doing 50 true false false false false Register CSV Comparision: 50 true false false false false doing 50 true false false false false Sram Params Verification: 50 true false false false false doing 10 70 281 64 50 true false false false false Start Index: (hex) 0 0 0 0 50 true false false false false 50 true false false false false End Index: (hex) 50 true false false false false 90 0 50 true false false false false Set Index Scen Info 10 20 163 25 Scenario Information 180 20 331 241 true Frame 660 290 131 23 Emulator Start 0 0 651 311 50 false 659 80 131 23 Scenario Start 660 110 131 21 50 true false false false Show 660 229 131 54 50 true false false false <html><head/><body>Continuous Frame Represent</body></html> Continuously 50 true false false false <html><head/><body>3D as default</body></html> 2D Activate 670 20 121 21 50 false Header Log En 660 140 131 85 6 QLayout::SetMaximumSize 0 0 58 23 50 false <html><head/><body>Log Count</body></html> 0 0 59 0 59 23 <html><head/><body>Current Count</body></html> 6 50 true false false false Frame Log 50 true false false false false Logging: 50 true false false false false doing 10 320 781 31 50 true false false false false Frame Log Path: 50 true false false false false 50 true false false false false Browse... 690 0 91 16 50 false <html><head/><body>Frame per second</body></html> FPS 660 50 141 21 50 false 1st Frame Log En E2PROMs 10 10 801 81 TRX 300 20 151 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 145 16777215 false 460 20 131 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 75 16777215 Serial No 0 0 127 16777215 false 600 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body>Master FPGA Version</body></html> MFV 0 0 92 16777215 <html><head/><body>Master FPGA Version</body></html> false 700 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body>Slave FPGA Version</body></html> SFV 0 0 92 16777215 <html><head/><body>Slave FPGA Version</body></html> false 100 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 92 16777215 false 200 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 92 16777215 false 0 20 102 61 QLayout::SetFixedSize 8 50 false Write Header 8 50 false Clear All 10 260 801 91 Probe 0 20 79 23 <html><head/><body>Select Probe</body></html> A B C D 340 60 391 31 50 false 730 60 71 31 50 true false false false false Browse... 0 60 71 17 50 false Operation: 80 60 41 17 50 false doing 120 60 206 27 0 QLayout::SetMaximumSize <html><head/><body>Read All Data From Probe</body></html> Read All false 0 0 200 16777215 0 0 <html><head/><body>Write All Data to Probe</body></html> Write All false 0 0 <html><head/><body>Wr En</body></html> En 260 20 541 31 Read Impulse Response 120 20 true 90 20 160 31 Read ID true 10 90 801 81 Probe Control 100 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 92 16777215 false 300 20 151 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 145 16777215 false 460 20 131 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 75 16777215 Serial No 0 0 127 16777215 false 200 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 92 16777215 false 0 20 102 61 QLayout::SetFixedSize 8 50 false Write Header 8 50 false Clear All 600 40 181 20 9 Compatibility Check 10 170 801 81 MPS 100 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 92 16777215 false 200 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 92 16777215 false 300 20 151 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 145 16777215 false 460 20 131 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 75 16777215 Serial No 0 0 127 16777215 false 600 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body>MicroController Version</body></html> UCV 0 0 92 16777215 <html><head/><body>MicroController Version</body></html> false 700 20 95 61 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body>Supervisory Version</body></html> SVV 0 0 92 16777215 <html><head/><body>Supervisory Version</body></html> false 0 20 102 61 8 50 false Write Header 8 50 false Clear All Debug 10 9 801 171 Built-in Test 10 70 781 31 50 true false false false false BITe I_Q Path: 0 0 50 true false false false false 50 true false false false false Browse... 0 0 0 98 0 80 16777215 Set I_Q 50 true false false false false doing 650 110 141 52 BITe Log 50 true false false false false BITe Logging: 50 true false false false false doing 10 30 781 31 50 true false false false false BITe Scen Path: 50 true false false false false 50 true false false false false Browse... 75 true true false false false Set Scenario 50 true false false false false doing 10 110 183 61 50 false BITe Log Count: 50 false 50 false Current Count: 50 false 0 0 59 0 <html><head/><body> </body></html> 6 10 190 801 171 ADC Logger 660 30 141 82 50 false Log Count: 0 0 55 22 6 ADC Log 50 true false false false false ADC Logging: 50 true false false false false doing 10 30 171 62 50 false Sample Count: 50 false Qt::ClickFocus 1 50 false Sync Count: 50 false Qt::ClickFocus 0 390 30 112 21 50 false Sync ADC Log 190 30 197 60 6 50 false Log Cnt En 0 0 90 0 50 false AFE Config 6 0 0 50 false ADC Log Cnt: 0 0 98 16777215 50 false 1 390 60 168 21 50 false Scen Frame ADC Log 500 30 81 23 50 false <html><head/><body>Sync Mode</body></html> Auto Manual 190 120 501 41 50 true false false false false ADC Log Path: 50 true false false false false 50 true false false false false Browse... 10 100 161 61 Pulser Test Mode 10 30 85 21 50 false Enable 90 30 61 23 50 false <html><head/><body>Pulser Mode</body></html> HZ T/R 390 90 113 21 50 false TxDAC Enable 710 120 81 41 50 false Qt::ClickFocus QDialogButtonBox::Discard 560 60 90 23 50 false Batch En Boards Test 10 10 801 101 Probe - Relay 10 40 501 41 50 true false false false false Log Path: 50 true false false false false 50 true false false false false Browse... 700 40 91 41 Start 520 29 185 61 0 <html><head/><body>Total Elements on Card : 32Total Elements on Probe : 192</body></html> Active Elements: <html><head/><body>Total Elements on Card : 32Total Elements on Probe : 192</body></html> true 50 false calculate of count: 50 false doing Temporary 680 20 121 31 75 true GT Reset 680 70 121 31 75 true Status Log 10 30 171 27 50 false Prog Count: Qt::Horizontal 85 20 50 false 1 10 70 171 27 50 false Task Iteration: 50 false 1 10 130 211 27 50 false Delay per Task(ms): Qt::Horizontal 100 20 50 false 500 10 170 213 27 50 false Scen Start Duration(s): 50 false 2 720 310 81 41 50 false Qt::ClickFocus QDialogButtonBox::Discard 680 120 121 31 75 true Endurance 680 170 121 31 75 true Built-in 680 220 121 31 75 true Frame Header 10 270 661 31 50 true false false false false Scenarios Folder: 50 true false false false false 50 true false false false false Browse... 680 270 121 31 75 true Scen Change 560 10 71 51 true <html><head/><body>Fan1 (D.C.)</body></html> 200 10 QAbstractSpinBox::DefaultStepType 10 10 560 70 71 51 true <html><head/><body>Fan2 (D.C.)</body></html> 200 10 QAbstractSpinBox::DefaultStepType 10 10 550 150 83 25 Spi Flash 550 190 83 25 Spi Verify 10 390 821 221 TRX Board 310 30 16 121 Qt::Vertical 320 30 141 21 12vin (V): TextLabel 320 50 131 21 5vin (V): TextLabel 320 70 134 21 D3.3 (V): TextLabel 320 90 167 21 AVDD,1.8 (V): TextLabel 320 110 168 21 DVDD,1.8 (V): TextLabel 540 50 162 19 RTF::Hall (V): TextLabel 320 130 156 21 RTF::3.3 (V): TextLabel 496 30 41 134 9 <html><head/><body>PG_12v</body></html> ukn 9 <html><head/><body>PG_5v</body></html> ukn 9 <html><head/><body>PG_3.3v</body></html> ukn 9 <html><head/><body>PG_1.8v Afe A</body></html> ukn 9 <html><head/><body>PG_1.8v Afe D</body></html> ukn 9 <html><head/><body>PG_3.3v PrbCtrl</body></html> ukn 540 90 163 46 Regulator A: <html><head/><body>PG_Reg A</body></html> Unknown Regulator B: <html><head/><body>PG_Reg B</body></html> Unknown 0 30 315 101 QLayout::SetFixedSize Status Vec: QLayout::SetFixedSize QLayout::SetFixedSize <html><head/><body>Prb Det Change</body></html> false <html><head/><body>Sram 1 Parity</body></html> false <html><head/><body>Sram 2 Parity</body></html> false <html><head/><body>MPS</body></html> false <html><head/><body>Scen PRI</body></html> false <html><head/><body>Scen Sync Ack</body></html> false <html><head/><body>Scen SRAM</body></html> false <html><head/><body>Sync FIFO</body></html> false <html><head/><body>Sync Point</body></html> false <html><head/><body>D Interleave FIFO</body></html> false <html><head/><body>D Interleave Point</body></html> false <html><head/><body>Pulser THD</body></html> false <html><head/><body>Thermal</body></html> false <html><head/><body>PG</body></html> false <html><head/><body>Prb Disconnect</body></html> false <html><head/><body>Fan</body></html> false <html><head/><body>Frame Lost</body></html> false <html><head/><body>D Interleave Offset Addr</body></html> false <html><head/><body>D Interleave SRAM Over 4M</body></html> false <html><head/><body>DDC LPF Reload</body></html> false <html><head/><body>ADC Flag Sync</body></html> false <html><head/><body>Emulator DMA Transfer</body></html> false <html><head/><body>DMA Ctrl Transfer</body></html> false <html><head/><body>Reserved</body></html> false 0 140 183 21 On Board Temp: Unknown 710 50 102 119 FPGA Version <html><head/><body>Master Code</body></html> Unknown <html><head/><body>Slave0 Code</body></html> Unknown <html><head/><body>Slave1 Code</body></html> Unknown <html><head/><body>Slave2 Code</body></html> Unknown 10 170 191 42 8 75 true true Fpga Core Temp(oC) <html><head/><body>Master Temperature</body></html> ukn <html><head/><body>Slave0 Temperature</body></html> ukn <html><head/><body>Slave1 Temperature</body></html> ukn <html><head/><body>Slave2 Temperature</body></html> ukn 210 170 191 42 8 75 true true Fpga Core Vcc Int(v) <html><head/><body>Master VCC Int</body></html> ukn <html><head/><body>Slave0 VCC Int</body></html> ukn <html><head/><body>Slave1 VCC Int</body></html> ukn <html><head/><body>Slave2 VCC Int</body></html> ukn 410 170 191 42 8 75 true true Fpga Core Vcc Aux(v) <html><head/><body>Master Vcc Aux</body></html> ukn <html><head/><body>Slave0 Vcc Aux</body></html> ukn <html><head/><body>Slave1 Vcc Aux</body></html> ukn <html><head/><body>Slave2 Vcc Aux</body></html> ukn 610 170 191 42 8 75 true true Fpga Core Vcc Bram(v) <html><head/><body>Master Vcc Bram</body></html> ukn <html><head/><body>Slave0 Vcc Bram</body></html> ukn <html><head/><body>Slave1 Vcc Bram</body></html> ukn <html><head/><body>Slave2 Vcc Bram</body></html> ukn 200 160 3 61 Qt::Vertical 400 160 3 61 Qt::Vertical 600 160 3 61 Qt::Vertical 730 30 71 16 <html><head/><body>PCI_ID</body></html> TextLabel 540 30 199 19 Gain VCNTLP (dB): TextLabel 190 140 111 21 MPS Temp: ukn 10 610 821 81 50 false Probe Board false 540 20 155 27 Selected probe: A B C D 0 20 512 51 16777215 16777215 Probe Type Slot A Slot B Slot C Slot D Disconnected Disconnected Disconnected Disconnected 10 690 821 271 Power Board 0 30 133 31 HVA_DAC: 140 30 134 31 HVB_DAC: 280 30 141 31 CWD_DAC: 0 110 141 21 CWDP: Unknown 0 130 141 21 Curr_24v: Unknown 0 150 141 21 +24v: Unknown 0 170 141 21 +12v: Unknown 0 190 141 21 +5v: Unknown 0 210 141 21 -5v: Unknown 0 230 141 21 HV_Stop: Unknown 0 250 141 21 4D: Unknown 0 90 141 21 HVBP: Unknown 0 70 141 21 HVAP: Unknown 170 70 161 21 HVAP_flt: Unknown 170 90 161 21 HVBP_flt: Unknown 170 110 161 21 CWDP_flt: Unknown 170 150 161 21 +24v_flt: Unknown 170 170 161 21 +12v_flt: Unknown 170 190 161 21 +5v_flt: Unknown 170 210 161 21 -5v_flt: Unknown 340 170 171 21 ovr_+12v_flt: Unknown 340 90 171 21 ovr_HVBP_flt: Unknown 340 210 171 21 ovr_-5v_flt: Unknown 340 150 171 21 ovr_+24v_flt: Unknown 340 190 171 21 ovr_+5v_flt: Unknown 340 70 171 21 ovr_HVAP_flt: Unknown 340 130 183 21 ovr_Curr24v_flt: Unknown 520 170 181 21 udr_+12v_flt: Unknown 520 110 181 21 udr_CWDP_flt: Unknown 520 90 181 21 udr_HVBP_flt: Unknown 520 210 181 21 udr_-5v_flt: Unknown 520 150 181 21 udr_+24v_flt: Unknown 520 190 181 21 udr_+5v_flt: Unknown 520 70 181 21 udr_HVAP_flt: Unknown 520 130 185 21 udr_Curr24v_flt: Unknown 170 250 161 21 4D_flt: Unknown 170 230 161 21 HV_flt: Unknown 340 230 171 21 ovr_HV_flt: Unknown 340 250 171 21 6 ovr_4D_flt: Unknown 520 250 181 21 udr_4D_flt: Unknown 520 230 181 21 udr_HV_flt: Unknown 710 230 101 25 Update 170 130 161 21 Curr24v_flt: Unknown 340 110 173 21 0 ovr_CWDP_flt: Unknown 720 30 75 23 Reset MPS 440 30 75 23 Set Ao 640 30 85 21 MPS Init 540 30 85 21 AO Power 720 70 81 21 75 true SE Read 720 100 81 31 50 false 710 150 101 65 9 75 true true Fans state <html><head/><body>Fan1</body></html> Unknown <html><head/><body>Fan2</body></html> Unknown 0 0 841 22 &File Exit QCustomPlot QWidget

qcustomplot.h