MainWindow 0 0 1109 1010 false Developed Hardware Ui 10 0 1091 641 75 true true false false ArrowCursor 6 Manual Operation 10 10 1061 141 0 0 0 130 16777215 150 75 true true false false Register Rd/Wr 360 40 171 80 50 true false false false Access registers by: 10 50 131 23 50 true false false false Register offset 10 30 141 23 50 true false false false Register number 550 70 187 31 50 true false false false Transaction width: 50 true false false false 16 32 64 20 30 311 101 0 50 true false false false Offset (Hex): 0 0 50 true false false false 32767 6 7 50 true false false false Bar: 50 true false false false 0 1 2 50 true false false false Value (Hex): true 16777215 16777215 50 true false false false 50 true false false false Write 0 0 50 true false false false Result (Hex): 50 true false false false QFrame::Box QFrame::Sunken QLCDNumber::Hex 0 0 50 true false false false Read 10 260 911 91 0 0 0 0 16777215 150 75 true true false false false Slave Programming 10 30 891 27 50 true false false false false Bit file: 50 true false false false false 50 true false false false false Browse... 10 60 148 21 50 true false false false false Programming: 50 true false false false false doing 790 60 111 23 75 true Program Bit 430 61 221 21 10 160 1061 91 0 0 0 0 16777215 150 75 true true false false false Flash Command 10 30 901 27 50 true false false false false Bin file: 50 false Qt::ClickFocus 50 true false false false false Browse... 10 60 102 21 50 true false false false false Writing: 50 true false false false false doing 680 60 111 23 75 true Write Bin 330 60 221 21 930 30 121 52 Read Bin 50 true false false false false Reading: 50 true false false false false doing 810 60 101 25 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">Select Flash</span></p></body></html> Spi Flash Bpi Flash 940 280 121 23 50 false GT reset/read 950 320 111 23 statusLog/s Power 0 30 1081 321 Power Board 20 30 151 41 HVA_DAC: 190 30 151 41 HVB_DAC: 360 30 151 41 CWD_DAC: 20 150 141 21 CWDP: Unknown 20 170 143 21 Curr_24v: Unknown 20 190 141 21 +24v: Unknown 20 210 141 21 +12v: Unknown 20 230 141 21 +5v: Unknown 20 250 141 21 -5v: Unknown 20 270 142 21 HV_Stop: Unknown 20 290 141 21 4D: Unknown 20 130 141 21 HVBP: Unknown 20 110 141 21 HVAP: Unknown 190 110 161 21 HVAP_flt: Unknown 190 130 161 21 HVBP_flt: Unknown 190 150 161 21 CWDP_flt: Unknown 190 190 161 21 +24v_flt: Unknown 190 210 161 21 +12v_flt: Unknown 190 230 161 21 +5v_flt: Unknown 190 250 161 21 -5v_flt: Unknown 380 210 171 21 ovr_+12v_flt: Unknown 380 130 175 21 ovr_HVBP_flt: Unknown 380 250 171 21 ovr_-5v_flt: Unknown 380 190 171 21 ovr_+24v_flt: Unknown 380 230 171 21 ovr_+5v_flt: Unknown 380 110 176 21 ovr_HVAP_flt: Unknown 380 170 191 21 ovr_Curr24v_flt: Unknown 580 210 181 21 udr_+12v_flt: Unknown 580 150 181 21 udr_CWDP_flt: Unknown 580 130 181 21 udr_HVBP_flt: Unknown 580 250 181 21 udr_-5v_flt: Unknown 580 190 181 21 udr_+24v_flt: Unknown 580 230 181 21 udr_+5v_flt: Unknown 580 110 181 21 udr_HVAP_flt: Unknown 580 170 191 21 udr_Curr24v_flt: Unknown 190 290 161 21 4D_flt: Unknown 190 270 161 21 HV_flt: Unknown 380 270 171 21 ovr_HV_flt: Unknown 380 290 171 21 6 ovr_4D_flt: Unknown 580 290 181 21 udr_4D_flt: Unknown 580 270 181 21 udr_HV_flt: Unknown 960 260 101 41 Update 190 170 161 21 Curr24v_flt: Unknown 380 150 178 21 0 ovr_CWDP_flt: Unknown 780 30 101 31 Reset MPS 530 30 91 41 Set Ao 660 30 91 31 MPS Init 960 30 101 31 AO Power 960 100 101 31 75 true SE Read 960 150 101 41 50 false Scen Player 450 500 361 101 75 true true false false Manual ATgc 10 50 37 15 50 true false false false Mode: 50 50 79 23 50 true false false false Auto Manual 140 50 38 15 50 true false false false Value: 180 50 71 23 50 true false false false 260 50 80 23 50 true false false false Set ATgc 10 500 321 101 75 true true false false Afe Regs Ctrl 0 50 71 23 50 true false false false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave FPGA Select</span></p></body></html> Slave0 Slave1 Slave2 80 50 71 23 50 true false false false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE Register Address (hex)</span></p></body></html> 160 50 80 23 50 true false false false Read 250 20 71 81 50 true false false false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE0</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE1</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE2</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE3</span></p></body></html> true 10 10 1071 181 0 0 0 105 16777215 200 75 true true false false false Scenario Command 10 30 1051 31 50 true false false false false Scenario Files Path: 50 true false false false false 50 true false false false false Browse... 960 70 106 52 75 true true false false false Set Scenario 50 true false false false false Filling: 50 true false false false false doing 720 70 235 102 50 true false false false false Scenario Verification 70 15 50 true false false false false Sram Bin Creating: 50 true false false false false doing 50 true false false false false Register CSV Comparision: 50 true false false false false doing 50 true false false false false Sram Params Verification: 50 true false false false false doing 10 70 281 64 50 true false false false false Start Index: (hex) 0 0 0 0 50 true false false false false 50 true false false false false End Index: (hex) 50 true false false false false 90 0 50 true false false false false Set Index 530 80 161 81 QLayout::SetFixedSize 0 0 90 45 10 75 true Scan Conversion Scenarios 200 210 271 271 true 20 210 163 25 Scenario Information 810 200 241 291 Dynamic Contrast 10 30 221 51 50 false Min Log Input: 9 50 false * 2 ^ 11 10 80 221 51 50 false Max Log Input: 9 50 false * 2 ^ 11 10 130 221 51 50 false Gain: <html><head/><body><p><span style=" font-size:9pt; font-weight:600; font-style:italic;">(log2(10^(gain/20))*2^11)</span></p></body></html> 9 50 false dB 10 240 221 41 0 0 9 50 false Set Dynamic Contrast Params 10 180 221 51 50 false Contrast Num: 9 50 false [1 - 12] Frame 950 290 131 23 Emulator Start 0 0 931 551 50 false 950 80 131 23 Scenario Start 950 110 131 21 50 true false false false Show 950 229 131 54 50 true false false false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Continuous Frame Represent</span></p></body></html> Continuously 50 true false false false <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">3D as default</span></p></body></html> 2D Activate 960 20 121 21 50 false Header Log En 950 140 131 85 6 QLayout::SetMaximumSize 0 0 58 23 50 false <html><head/><body><p><span style=" font-size:8pt; font-weight:600;">Log Count</span></p></body></html> 0 0 59 0 59 23 <html><head/><body><p><span style=" font-size:8pt;">Current Count</span></p></body></html> 6 50 true false false false Frame Log 50 true false false false false Logging: 50 true false false false false doing 0 570 781 31 50 true false false false false Frame Log Path: 50 true false false false false 50 true false false false false Browse... 980 0 91 16 50 false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Frame per second</span></p></body></html> FPS 940 50 141 21 50 false 1st Frame Log En 900 560 181 41 Scan Conversion Dynamic Contrast E2PROMs 10 10 1061 101 TRX 430 20 171 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 165 16777215 false 620 20 181 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 175 16777215 Serial Number 0 0 175 16777215 false 820 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master FPGA Version</span></p></body></html> MFV 0 0 98 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master FPGA Version</span></p></body></html> false 940 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave FPGA Version</span></p></body></html> SFV 0 0 98 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave FPGA Version</span></p></body></html> false 190 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 97 16777215 false 310 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 98 16777215 false 0 20 151 71 QLayout::SetFixedSize 10 75 true Write Header 10 75 true Clear All 10 360 1061 91 Probe 0 20 79 23 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">Select Probe</span></p></body></html> A B C D 340 60 641 31 50 false 990 60 71 31 50 true false false false false Browse... 0 60 71 17 50 false Operation: 80 60 41 17 50 false doing 120 60 206 27 0 QLayout::SetMaximumSize <html><head/><body><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Read All Data From Probe</span></p></body></html> Read All false 0 0 200 16777215 0 0 <html><head/><body><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Write All Data to Probe</span></p></body></html> Write All false 0 0 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">Wr En</p></body></html> En 260 20 801 31 Read Impulse Response 120 20 true 90 20 160 31 Read ID true 10 120 1061 101 Probe Control 190 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 97 16777215 false 430 20 171 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 165 16777215 false 620 20 181 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 175 16777215 Serial Number 0 0 175 16777215 false 310 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 98 16777215 false 0 20 151 71 QLayout::SetFixedSize 10 75 true Write Header 10 75 true Clear All 830 40 211 41 11 Compatibility Check 10 230 1061 101 MPS 190 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 ID 0 0 97 16777215 false 310 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 PID 0 0 98 16777215 false 430 20 171 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 92 16777215 PCB Version 0 0 165 16777215 false 620 20 181 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 175 16777215 Serial Number 0 0 175 16777215 false 820 20 101 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">MicroController Version</span></p></body></html> UCV 0 0 98 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">MicroController Version</span></p></body></html> false 940 20 102 71 QLayout::SetFixedSize QLayout::SetFixedSize 0 0 45 16777215 Wr 0 0 40 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Supervisory Version</span></p></body></html> SVV 0 0 98 16777215 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Supervisory Version</span></p></body></html> false 0 20 151 71 10 75 true Write Header 10 75 true Clear All 10 490 1061 101 Probe - Relay 10 40 731 41 50 true false false false false Log Path: 50 true false false false false 50 true false false false false Browse... 960 40 91 41 Start 760 29 185 61 0 <html><head/><body><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Total Elements on Card : 32</span></p><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Total Elements on Probe : 192</span></p></body></html> Active Elements: <html><head/><body><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Total Elements on Card : 32</span></p><p><span style=" font-size:7pt;font-weight:600; font-style:italic;">Total Elements on Probe : 192</span></p></body></html> true 50 false calculate of count: 50 false doing Debug 10 9 1061 171 Built-in Test 10 70 1041 31 50 true false false false false BITe I_Q Path: 0 0 50 true false false false false 50 true false false false false Browse... 0 0 0 98 0 80 16777215 Set I_Q 50 true false false false false doing 910 110 141 52 BITe Log 50 true false false false false BITe Logging: 50 true false false false false doing 10 30 1041 31 50 true false false false false BITe Scen Path: 50 true false false false false 50 true false false false false Browse... 75 true true false false false Set Scenario 50 true false false false false doing 10 110 183 61 50 false BITe Log Count: 50 false 50 false Current Count: 50 false 0 0 59 0 <html><head/><body><p><br/></p></body></html> 6 10 190 1061 201 ADC Logger 750 30 141 91 50 false Log Count: 0 0 55 22 6 ADC Log 50 true false false false false ADC Logging: 50 true false false false false doing 10 30 171 81 50 false Sample Count: 50 false Qt::ClickFocus 1 50 false Sync Count: 50 false Qt::ClickFocus 0 440 30 112 21 50 false Sync ADC Log 190 30 231 81 6 50 false Log Cnt En 0 0 90 0 50 false AFE Config 6 0 0 50 false ADC Log Cnt: 0 0 98 16777215 50 false 1 440 70 168 21 50 false Scen Frame ADC Log 620 30 81 23 50 false <html><head/><body><p><span style=" font-size:8pt;">Sync Mode</span></p></body></html> Auto Manual 10 140 721 41 50 true false false false false ADC Log Path: 50 true false false false false 50 true false false false false Browse... 440 110 113 21 50 false TxDAC Enable 750 140 111 41 50 false Qt::ClickFocus QDialogButtonBox::Discard 620 70 90 23 50 false Batch En 900 30 161 61 Pulser Test Mode 10 30 85 21 50 false Enable 90 30 61 23 50 false <html><head/><body><p><span style=" font-size:8pt;">Pulser Mode</span></p></body></html> HZ T/R Temporary 680 20 121 31 75 true GT Reset 680 70 121 31 75 true Status Log 10 30 171 27 50 false Prog Count: Qt::Horizontal 85 20 50 false 1 10 70 171 27 50 false Task Iteration: 50 false 1 10 130 211 27 50 false Delay per Task(ms): Qt::Horizontal 100 20 50 false 500 10 170 213 27 50 false Scen Start Duration(s): 50 false 2 720 310 81 41 50 false Qt::ClickFocus QDialogButtonBox::Discard 680 120 121 31 75 true Endurance 680 170 121 31 75 true Built-in 680 220 121 31 75 true Frame Header 10 270 661 31 50 true false false false false Scenarios Folder: 50 true false false false false 50 true false false false false Browse... 680 270 121 31 75 true Scen Change 560 10 71 51 true <html><head/><body><p><span style=" font-size:9pt; font-weight:600; font-style:italic;">Fan1 (D.C.)</p></body></html> 200 10 QAbstractSpinBox::DefaultStepType 10 10 560 70 71 51 true <html><head/><body><p><span style=" font-size:9pt; font-weight:600; font-style:italic;">Fan2 (D.C.)</p></body></html> 200 10 QAbstractSpinBox::DefaultStepType 10 10 550 150 83 25 Spi Flash 550 190 83 25 Spi Verify 10 650 1091 241 TRX Board 330 40 16 121 Qt::Vertical 350 40 181 21 12vin (V): TextLabel 350 60 181 21 5vin (V): TextLabel 350 80 181 21 D3.3 (V): TextLabel 350 100 181 21 AVDD,1.8 (V): TextLabel 350 120 181 21 DVDD,1.8 (V): TextLabel 640 60 162 31 RTF::Hall (V): TextLabel 350 140 181 21 RTF::3.3 (V): TextLabel 540 30 41 134 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_12v</span></p></body></html> ukn 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_5v</span></p></body></html> ukn 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_3.3v</span></p></body></html> ukn 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_1.8v Afe A</span></p></body></html> ukn 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_1.8v Afe D</span></p></body></html> ukn 9 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_3.3v PrbCtrl</span></p></body></html> ukn 640 100 163 61 Regulator A: <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_Reg A</span></p></body></html> Unknown Regulator B: <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_Reg B</span></p></body></html> Unknown 10 30 321 101 QLayout::SetFixedSize Status Vec: QLayout::SetFixedSize QLayout::SetFixedSize <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Prb Det Change</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sram 1 Parity</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sram 2 Parity</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">MPS</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen PRI</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen Sync Ack</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen SRAM</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sync FIFO</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sync Point</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave FIFO</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave Point</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Pulser THD</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Thermal</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Prb Disconnect</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Fan</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Frame Lost</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave Offset Addr</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave SRAM Over 4M</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">DDC LPF Reload</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">ADC Flag Sync</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Emulator DMA Transfer</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">DMA Ctrl Transfer</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Reserved</span></p></body></html> false 10 140 191 31 On Board Temp: Unknown 850 30 111 131 FPGA Version <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master Code</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 Code</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 Code</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 Code</span></p></body></html> Unknown 10 180 191 51 9 75 true true Fpga Core Temp(oC) <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master Temperature</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 Temperature</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 Temperature</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 Temperature</span></p></body></html> ukn 220 180 191 51 9 75 true true Fpga Core Vcc Int(v) <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master VCC Int</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 VCC Int</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 VCC Int</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 VCC Int</span></p></body></html> ukn 430 180 191 51 9 75 true true Fpga Core Vcc Aux(v) <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master Vcc Aux</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 Vcc Aux</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 Vcc Aux</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 Vcc Aux</span></p></body></html> ukn 640 180 201 51 9 75 true true Fpga Core Vcc Bram(v) <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master Vcc Bram</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 Vcc Bram</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 Vcc Bram</span></p></body></html> ukn <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 Vcc Bram</span></p></body></html> ukn 210 170 3 61 Qt::Vertical 420 170 3 61 Qt::Vertical 630 170 3 61 Qt::Vertical 990 30 81 16 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">PCI_ID</span></p></body></html> TextLabel Qt::AlignCenter 590 28 211 31 Gain VCNTLP (dB): TextLabel 220 140 111 31 MPS Temp: ukn 970 150 111 81 10 75 true true Fans state Qt::AlignCenter <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Fan1</span></p></body></html> Unknown Qt::AlignCenter <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Fan2</span></p></body></html> Unknown Qt::AlignCenter 10 900 1091 81 50 false Probe Board false 540 20 155 27 Selected probe: A B C D 0 20 512 61 16777215 16777215 Probe Type Slot A Slot B Slot C Slot D Disconnected Disconnected Disconnected Disconnected 0 0 1109 22 &File Exit QCustomPlot QWidget
qcustomplot.h
1