MainWindow 0 0 854 883 MainWindow 0 0 811 331 0 Manual Operation 0 0 741 135 0 0 0 135 16777215 135 Register Rd/Wr 360 40 171 80 Access registers by: 10 50 131 23 Register offset 10 30 141 23 Register number 550 70 175 27 Transaction width: 32 64 20 30 311 101 0 : Qt::Horizontal 40 20 Bar: 0 1 2 Value: (Hex) true 16777215 16777215 Write 0 0 result: (Hex) QFrame::Box QFrame::Sunken QLCDNumber::Hex 0 0 Read 0 150 741 105 0 0 0 105 16777215 105 50 false false Slave Programming: 10 30 721 27 Bit file: Browse... 10 70 128 17 Programming: doing 650 70 80 23 Program Scen Player 440 190 351 101 Manual ATgc 10 50 37 15 Mode: 50 50 79 23 Auto Manual 140 50 38 15 Value: 180 50 71 23 260 50 80 23 Set ATgc 0 190 331 101 Afe Regs Ctrl 0 50 71 23 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave FPGA Select</span></p></body></html> Slave0 Slave1 Slave2 80 50 71 23 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE Register Address (hex)</span></p></body></html> 160 50 80 23 Read 250 30 71 61 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE0</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE1</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE2</span></p><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">AFE3</span></p></body></html> true 0 10 791 171 0 0 0 105 16777215 200 50 false false Scenario Parameters 10 30 771 27 Scenario Files Path: Browse... 690 70 91 48 Set Scenario Filling: doing 460 70 205 94 Scenario Verification 70 15 Sram Bin Creating: doing Register CSV Comparision: doing Sram Params Verification: doing 10 70 281 60 Start Index: (hex) 0 0 0 0 End Index: (hex) 90 0 Set Index Frame 670 90 101 25 InstantLog 670 190 96 21 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">3D as default</span></p></body></html> 2D Activate 670 220 101 23 Emulator Start 0 0 631 281 670 10 101 23 Scenario Start 670 50 101 25 Show 670 130 101 25 Log Browse 660 250 121 23 Emulator Browse 670 170 104 21 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Continuous Frame Represent</span></p></body></html> Continuously E2PROMs 10 0 381 81 TRX 0 20 151 61 false Read ID Write ID 160 20 221 61 Read Info Write Info 0 0 100 49 false 410 90 381 131 Probe 180 20 201 111 Read Impulse Response 120 20 true 90 20 82 61 Read ID true 0 20 79 23 <html><head/><body><p><span style=" font-size:8pt; font-weight:600; font-style:italic;">Select Probe</span></p></body></html> A B C D 410 0 381 81 MPS 0 20 151 61 false Read ID Write ID 160 20 221 61 Read Info Write Info 0 0 100 49 false 10 90 381 81 Probe Control 0 20 151 61 false Read ID Write ID 160 20 221 61 Read Info Write Info 0 0 100 49 false 0 330 811 161 TRX Board 300 30 16 111 Qt::Vertical 0 30 126 21 PCIe_ID: TextLabel 310 30 126 17 12vin (V): TextLabel 310 50 119 17 5vin (V): TextLabel 310 70 121 17 D3.3 (V): TextLabel 310 90 151 17 AVDD,1.8 (V): TextLabel 310 110 152 17 DVDD,1.8 (V): TextLabel 540 30 147 17 RTF::Hall (V): TextLabel 310 130 143 17 RTF::3.3 (V): TextLabel 540 50 164 17 AFE Vcntlp (db): TextLabel 470 30 62 122 <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_12v</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_5v</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_3.3v</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_1.8v Afe A</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_1.8v Afe D</span></p></body></html> Unknown <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_3.3v PrbCtrl</span></p></body></html> Unknown 540 90 145 62 Regulator A: <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_Reg A</span></p></body></html> Unknown Regulator B: <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG_Reg B</span></p></body></html> Unknown 0 60 285 67 Status Vec: <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Prb Det Change</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sram 1 Parity</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sram 2 Parity</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">MPS</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen PRI</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen GT</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Scen SRAM</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sync FIFO</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Sync Point</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave FIFO</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">D Interleave Point</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Pulser THD</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Thermal</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">PG</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Prb Disconnect</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Fan</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Emulator DMA Transfer</span></p></body></html> false <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">DMA Ctrl Transfer</span></p></body></html> false 140 30 163 21 On Board Temp: Unknown 710 40 101 111 FPGA Version <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Master Code</span></p></body></html> TextLabel <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave0 Code</span></p></body></html> TextLabel <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave1 Code</span></p></body></html> TextLabel <html><head/><body><p><span style=" font-size:7pt; font-weight:600; font-style:italic;">Slave2 Code</span></p></body></html> TextLabel 0 490 821 91 50 false Probe Board false 540 20 142 25 Selected probe: A B C D 0 20 481 61 Probe Type Slot A Slot B Slot C Slot D Disconnected Disconnected Disconnected Disconnected 0 590 821 271 Power Board 0 30 131 31 HVA_DAC: 140 30 131 31 HVB_DAC: 280 30 141 31 CWD_DAC: 0 110 141 21 CWDP: Unknown 0 130 141 21 Curr_24v: Unknown 0 150 141 21 +24v: Unknown 0 170 141 21 +12v: Unknown 0 190 141 21 +5v: Unknown 0 210 141 21 -5v: Unknown 0 230 141 21 HV_Stop: Unknown 0 250 141 21 4D: Unknown 0 90 141 21 HVBP: Unknown 0 70 141 21 HVAP: Unknown 170 70 161 21 HVAP_flt: Unknown 170 90 161 21 HVBP_flt: Unknown 170 110 161 21 CWDP_flt: Unknown 170 150 161 21 +24v_flt: Unknown 170 170 161 21 +12v_flt: Unknown 170 190 161 21 +5v_flt: Unknown 170 210 161 21 -5v_flt: Unknown 340 170 171 21 ovr_+12v_flt: Unknown 340 90 171 21 ovr_HVBP_flt: Unknown 340 210 171 21 ovr_-5v_flt: Unknown 340 150 171 21 ovr_+24v_flt: Unknown 340 190 171 21 ovr_+5v_flt: Unknown 340 70 171 21 ovr_HVAP_flt: Unknown 340 130 173 21 ovr_Curr24v_flt: Unknown 520 170 181 21 udr_+12v_flt: Unknown 520 110 181 21 udr_CWDP_flt: Unknown 520 90 181 21 udr_HVBP_flt: Unknown 520 210 181 21 udr_-5v_flt: Unknown 520 150 181 21 udr_+24v_flt: Unknown 520 190 181 21 udr_+5v_flt: Unknown 520 70 181 21 udr_HVAP_flt: Unknown 520 130 181 21 udr_Curr24v_flt: Unknown 170 250 161 21 4D_flt: Unknown 170 230 161 21 HV_flt: Unknown 340 230 171 21 ovr_HV_flt: Unknown 340 250 171 21 6 ovr_4D_flt: Unknown 520 250 181 21 udr_4D_flt: Unknown 520 230 181 21 udr_HV_flt: Unknown 710 230 101 25 Update 710 140 82 17 fan1_flt: Ukn 710 170 82 17 fan2_flt: Ukn 170 130 161 21 Curr24v_flt: Unknown 340 110 171 21 0 ovr_CWDP_flt: Unknown 720 60 75 23 Reset MPS 440 30 75 23 Set Ao 720 30 85 21 MPS Init QCustomPlot QWidget
qcustomplot.h
1
chk_continuousShowing clicked(bool) btn_dmaShow setHidden(bool) 727 216 733 88