52 changed files with 2926 additions and 1815 deletions
@ -1,30 +0,0 @@ |
|||||
#ifndef DMACTRL_H |
|
||||
#define DMACTRL_H |
|
||||
|
|
||||
#include "model/hardware/device/SonoDevice.h" |
|
||||
//#include "model/hardware/service/HardwarePacketEngine.h"
|
|
||||
|
|
||||
struct EmulatorProperties |
|
||||
{ |
|
||||
EmulatorProperties(); |
|
||||
|
|
||||
}; |
|
||||
|
|
||||
class DmaCtrl |
|
||||
{ |
|
||||
private: |
|
||||
SonoDevice* _device; |
|
||||
void startTransfer(bool emulatorEn); |
|
||||
void stopTransfer(); |
|
||||
void setRamOffsetAddress(qint32 offset); |
|
||||
void setTransferLength(qint32 length); |
|
||||
void setTransferRate(float rate); |
|
||||
void setOptions(bool performanceMode); |
|
||||
void setMode(bool dynamicMode); |
|
||||
|
|
||||
public: |
|
||||
DmaCtrl(); |
|
||||
void dmaTransactionMode(bool emulActive) const; |
|
||||
}; |
|
||||
|
|
||||
#endif // DMACTRL_H
|
|
||||
@ -0,0 +1,32 @@ |
|||||
|
#ifndef EMULATOR_H |
||||
|
#define EMULATOR_H |
||||
|
|
||||
|
#include "registerDefinition/RamAddress.h" |
||||
|
#include "registerDefinition/TransferMode.h" |
||||
|
#include "registerDefinition/TransferRate.h" |
||||
|
#include "registerDefinition/EmulatorActivation.h" |
||||
|
|
||||
|
#define EMULATOR_ENABLE 1U |
||||
|
#define EMULATOR_DISABLE 0U |
||||
|
|
||||
|
class Emulator |
||||
|
{ |
||||
|
private: |
||||
|
RamAddress* _ramAddr; |
||||
|
TransferMode* _transMode; |
||||
|
TransferRate* _transRate; |
||||
|
EmulatorActivation* _emulAct; |
||||
|
|
||||
|
public: |
||||
|
explicit Emulator(SonoDevice* device); |
||||
|
~Emulator(); |
||||
|
|
||||
|
void setEmulatorEn() const; |
||||
|
void setEmulatorDis() const; |
||||
|
|
||||
|
void setTransferMode(bool option, bool mode, quint32 length) const; |
||||
|
void setRamOffsetAddress(quint32 offset) const; |
||||
|
void setTransferRate(float rate) const; |
||||
|
}; |
||||
|
|
||||
|
#endif // EMULATOR_H
|
||||
@ -0,0 +1,31 @@ |
|||||
|
#ifndef EMULATORACTIVATION_H |
||||
|
#define EMULATORACTIVATION_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define EMULATOR_ACTIVATION_MASK 0x00000002 |
||||
|
|
||||
|
#define BAR 0U |
||||
|
#define OFFSET 0X8 |
||||
|
|
||||
|
class EmulatorActivation : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* emulatorActivation; |
||||
|
|
||||
|
EmulatorActivation(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(emulatorActivation, EMULATOR_ACTIVATION_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef EMULATOR_ACTIVATION_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
|
||||
|
#endif // EMULATORACTIVATION_H
|
||||
@ -0,0 +1,30 @@ |
|||||
|
#ifndef RAMADDRESS_H |
||||
|
#define RAMADDRESS_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define RAM_BUF_ADDR_MASK 0x00FFFFFF |
||||
|
|
||||
|
#define BAR 2U |
||||
|
#define OFFSET 0X2024 |
||||
|
|
||||
|
class RamAddress : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* ramBufAddr; |
||||
|
|
||||
|
RamAddress(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(ramBufAddr, RAM_BUF_ADDR_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef RAM_BUF_ADDR_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // RAMADDRESS_H
|
||||
@ -0,0 +1,38 @@ |
|||||
|
#ifndef TRANSFERMODE_H |
||||
|
#define TRANSFERMODE_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define TRANSFER_LENGTH_MASK 0x007FFFFF |
||||
|
#define EMUL_MODE_MASK 0x40000000 |
||||
|
#define EMUL_OPTION_MASK 0x80000000 |
||||
|
|
||||
|
#define BAR 2U |
||||
|
#define OFFSET 0X2028 |
||||
|
|
||||
|
class TransferMode : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* transferLength; |
||||
|
Field* emulMode; |
||||
|
Field* emulOption; |
||||
|
|
||||
|
TransferMode(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(transferLength, TRANSFER_LENGTH_MASK); |
||||
|
ADD_UNSIGNED_FIELD(emulMode, EMUL_MODE_MASK); |
||||
|
ADD_UNSIGNED_FIELD(emulOption, EMUL_OPTION_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef TRANSFER_LENGTH_MASK |
||||
|
#undef EMUL_MODE_MASK |
||||
|
#undef EMUL_OPTION_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // TRANSFERMODE_H
|
||||
@ -0,0 +1,30 @@ |
|||||
|
#ifndef TRANSFERRATE_H |
||||
|
#define TRANSFERRATE_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define TRANSFER_RATE_MASK 0xFFFFFFFF |
||||
|
|
||||
|
#define BAR 2U |
||||
|
#define OFFSET 0X202C |
||||
|
|
||||
|
class TransferRate : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* transferRate; |
||||
|
|
||||
|
TransferRate(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(transferRate, TRANSFER_RATE_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef TRANSFER_RATE_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // TRANSFERRATE_H
|
||||
@ -0,0 +1,84 @@ |
|||||
|
#ifndef MISC_H |
||||
|
#define MISC_H |
||||
|
|
||||
|
#include "registerDefinition/FpgaVersion.h" |
||||
|
#include "registerDefinition/GtSendMode.h" |
||||
|
#include "registerDefinition/StatusVector.h" |
||||
|
#include "registerDefinition/SyncMode.h" |
||||
|
|
||||
|
struct StatusVec |
||||
|
{ |
||||
|
bool probeDetChanInterrupt; |
||||
|
bool sram1ParityErr; |
||||
|
bool sram2ParityErr; |
||||
|
bool mpsErr; |
||||
|
bool scenPriErr; |
||||
|
bool scenGtErr; |
||||
|
bool scenSramErr; |
||||
|
bool syncFifoErr; |
||||
|
bool syncPointErr; |
||||
|
bool dintrlvFifoErr; |
||||
|
bool dintrlvPointErr; |
||||
|
bool pulserThd; |
||||
|
bool thermalErr; |
||||
|
bool pgErr; |
||||
|
bool probeDisconnectErr; |
||||
|
bool fanFault; |
||||
|
bool emulDmaTransferErr; |
||||
|
bool dmaCtrlTransferErr; |
||||
|
}; |
||||
|
|
||||
|
struct FpgaCodeVersion |
||||
|
{ |
||||
|
quint32 masterCode; |
||||
|
quint32 slave0Code; |
||||
|
quint32 slave1Code; |
||||
|
quint32 slave2Code; |
||||
|
}; |
||||
|
|
||||
|
enum eGtSendCtrl : quint8 |
||||
|
{ |
||||
|
BfMode = 1, |
||||
|
AdcMode, |
||||
|
DbgMode, |
||||
|
}; |
||||
|
|
||||
|
enum eSyncCtrl : quint8 |
||||
|
{ |
||||
|
BfSyncMode, |
||||
|
AdcSyncMode, |
||||
|
BfAdcLogMode, |
||||
|
}; |
||||
|
|
||||
|
class Misc |
||||
|
{ |
||||
|
private: |
||||
|
const quint32 _offsetMaster; |
||||
|
const quint32 _offsetSlave0; |
||||
|
const quint32 _offsetSlave1; |
||||
|
const quint32 _offsetSlave2; |
||||
|
|
||||
|
FpgaVersion* _s0Version; |
||||
|
FpgaVersion* _s1Version; |
||||
|
FpgaVersion* _s2Version; |
||||
|
FpgaVersion* _mVersion; |
||||
|
StatusVector* _status; |
||||
|
GtSendMode* _gt; |
||||
|
SyncMode* _sync; |
||||
|
|
||||
|
template<class T> |
||||
|
quint32 getVersion (T* version) const; |
||||
|
|
||||
|
public: |
||||
|
explicit Misc(SonoDevice* device); |
||||
|
~Misc(); |
||||
|
|
||||
|
void getStatusVector(StatusVec* status) const; |
||||
|
void getFpgaVersion(FpgaCodeVersion* version) const; |
||||
|
void setGtSendMode (eGtSendCtrl gtMode) const; |
||||
|
void setSyncMode (eSyncCtrl syncMode) const; |
||||
|
|
||||
|
}; |
||||
|
|
||||
|
|
||||
|
#endif // MISC_H
|
||||
@ -0,0 +1,30 @@ |
|||||
|
#ifndef FPGAVERSION_H |
||||
|
#define FPGAVERSION_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define SYNTHESIS_TIME_MASK 0xFFFFFFFF |
||||
|
|
||||
|
#define BAR 0U |
||||
|
#define OFFSET 0x4 |
||||
|
|
||||
|
class FpgaVersion : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* synthesisTime; |
||||
|
|
||||
|
FpgaVersion(SonoDevice* device, quint32 offset) : Register(BAR, OFFSET+offset, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(synthesisTime, SYNTHESIS_TIME_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef SYNTHESIS_TIME_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // FPGAVERSION_H
|
||||
@ -0,0 +1,30 @@ |
|||||
|
#ifndef GTSENDMODE_H |
||||
|
#define GTSENDMODE_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define GT_SEND_MODE_CTRL_MASK 0x00000003 |
||||
|
|
||||
|
#define BAR 0U |
||||
|
#define OFFSET 0X10 |
||||
|
|
||||
|
class GtSendMode : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* gtSendModeCtrl; |
||||
|
|
||||
|
GtSendMode(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(gtSendModeCtrl, GT_SEND_MODE_CTRL_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef GT_SEND_MODE_CTRL_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // GTSENDMODE_H
|
||||
@ -0,0 +1,98 @@ |
|||||
|
#ifndef STATUSVECTOR_H |
||||
|
#define STATUSVECTOR_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define PROBE_DETECTION_INTERRUPT_MASK 0x00000001 |
||||
|
#define SRAM_1_PARITY_Err_MASK 0x00000002 |
||||
|
#define SRAM_2_PARITY_Err_MASK 0x00000004 |
||||
|
#define MPS_Err_MASK 0x00000008 |
||||
|
#define SCEN_RPI_Err_MASK 0x00000010 |
||||
|
#define SCEN_GT_Err_MASK 0x00000020 |
||||
|
#define SCEN_SRAM_Err_MASK 0x00000040 |
||||
|
#define SYNC_FIFO_Err_MASK 0x00000080 |
||||
|
#define SYNC_POINT_Err_MASK 0x00000100 |
||||
|
#define DINTRLV_FIFO_Err_MASK 0x00000200 |
||||
|
#define DINTRLV_POINT_Err_MASK 0x00000400 |
||||
|
#define PULSER_THD_MASK 0x00000800 |
||||
|
#define THERMAL_Err_MASK 0x00001000 |
||||
|
#define PG_Err_MASK 0x00002000 |
||||
|
#define PROBE_DISCONNECT_Err_MASK 0x00004000 |
||||
|
#define FAN_FAULT_MASK 0x00008000 |
||||
|
#define EMUL_DMA_TRANSFER_Err_MASK 0x40000000 |
||||
|
#define DMA_CTRL_TRANSFER_Err_MASK 0x80000000 |
||||
|
|
||||
|
#define BAR 0U |
||||
|
#define OFFSET 0x0 |
||||
|
|
||||
|
class StatusVector : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* probeDetChanInterrupt; |
||||
|
Field* sram1ParityErr; |
||||
|
Field* sram2ParityErr; |
||||
|
Field* mpsErr; |
||||
|
Field* scenPriErr; |
||||
|
Field* scenGtErr; |
||||
|
Field* scenSramErr; |
||||
|
Field* syncFifoErr; |
||||
|
Field* syncPointErr; |
||||
|
Field* dintrlvFifoErr; |
||||
|
Field* dintrlvPointErr; |
||||
|
Field* pulserThd; |
||||
|
Field* thermalErr; |
||||
|
Field* pgErr; |
||||
|
Field* probeDisconnectErr; |
||||
|
Field* fanFault; |
||||
|
Field* emulDmaTransferErr; |
||||
|
Field* dmaCtrlTransferErr; |
||||
|
|
||||
|
StatusVector(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(probeDetChanInterrupt, PROBE_DETECTION_INTERRUPT_MASK); |
||||
|
ADD_UNSIGNED_FIELD(sram1ParityErr, SRAM_1_PARITY_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(sram2ParityErr, SRAM_2_PARITY_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(mpsErr, MPS_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(scenPriErr, SCEN_RPI_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(scenGtErr, SCEN_GT_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(scenSramErr, SCEN_SRAM_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(syncFifoErr, SYNC_FIFO_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(syncPointErr, SYNC_POINT_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(dintrlvFifoErr, DINTRLV_FIFO_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(dintrlvPointErr, DINTRLV_POINT_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(pulserThd, PULSER_THD_MASK); |
||||
|
ADD_UNSIGNED_FIELD(thermalErr, THERMAL_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(pgErr, PG_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(probeDisconnectErr, PROBE_DISCONNECT_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(fanFault, FAN_FAULT_MASK); |
||||
|
ADD_UNSIGNED_FIELD(emulDmaTransferErr, EMUL_DMA_TRANSFER_Err_MASK); |
||||
|
ADD_UNSIGNED_FIELD(dmaCtrlTransferErr, DMA_CTRL_TRANSFER_Err_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef PROBE_DETECTION_INTERRUPT_MASK |
||||
|
#undef SRAM_1_PARITY_Err_MASK |
||||
|
#undef SRAM_2_PARITY_Err_MASK |
||||
|
#undef MPS_Err_MASK |
||||
|
#undef SCEN_RPI_Err_MASK |
||||
|
#undef SCEN_GT_Err_MASK |
||||
|
#undef SCEN_SRAM_Err_MASK |
||||
|
#undef SYNC_FIFO_Err_MASK |
||||
|
#undef SYNC_POINT_Err_MASK |
||||
|
#undef DINTRLV_FIFO_Err_MASK |
||||
|
#undef DINTRLV_POINT_Err_MASK |
||||
|
#undef PULSER_THD_MASK |
||||
|
#undef THERMAL_Err_MASK |
||||
|
#undef PG_Err_MASK |
||||
|
#undef PROBE_DISCONNECT_Err_MASK |
||||
|
#undef FAN_FAULT_MASK |
||||
|
#undef EMUL_DMA_TRANSFER_Err_MASK |
||||
|
#undef DMA_CTRL_TRANSFER_Err_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // STATUSVECTOR_H
|
||||
@ -0,0 +1,34 @@ |
|||||
|
#ifndef SYNCMODE_H |
||||
|
#define SYNCMODE_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define SYNC_MDOE_MASK 0x00000003 |
||||
|
#define MANUAL_SYNC_MASK 0x00000004 |
||||
|
|
||||
|
#define BAR 0U |
||||
|
#define OFFSET 0x14 |
||||
|
|
||||
|
class SyncMode : public Register |
||||
|
{ |
||||
|
public: |
||||
|
Field* syncMode; |
||||
|
Field* manualSync; |
||||
|
|
||||
|
SyncMode(SonoDevice* device) : Register(BAR, OFFSET, device) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD(syncMode, SYNC_MDOE_MASK); |
||||
|
ADD_UNSIGNED_FIELD(manualSync, MANUAL_SYNC_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef SYNC_MDOE_MASK |
||||
|
#undef MANUAL_SYNC_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
|
||||
|
#endif // SYNCMODE_H
|
||||
@ -0,0 +1,37 @@ |
|||||
|
#ifndef SRAM_H |
||||
|
#define SRAM_H |
||||
|
|
||||
|
#include "registerDefinition/Index.h" |
||||
|
#include "registerDefinition/TxParams.h" |
||||
|
#include "registerDefinition/RxParams.h" |
||||
|
#include "registerDefinition/RxParamsPos.h" |
||||
|
#include "registerDefinition/RxParamsDelay.h" |
||||
|
#include "registerDefinition/TxParamsFocus.h" |
||||
|
#include "registerDefinition/RxParamsDegree.h" |
||||
|
|
||||
|
#define INDEX_INTERVAL 1U |
||||
|
#define TX_RX_INTERVAL 27U |
||||
|
#define INNER_RX_INTERVAL 3U |
||||
|
|
||||
|
class Sram |
||||
|
{ |
||||
|
private: |
||||
|
Index* _index; |
||||
|
TxParams* _tx; |
||||
|
TxParamsFocus* _txFocus; |
||||
|
RxParams* _rx; |
||||
|
RxParamsDegree* _rxDegree; |
||||
|
RxParamsPos* _rxPos; |
||||
|
RxParamsDelay* _rxDelay; |
||||
|
|
||||
|
public: |
||||
|
explicit Sram(SonoDevice* device); |
||||
|
~Sram(); |
||||
|
|
||||
|
void setSramIndex (quint32& totalTxShotNumber, SramIndex* index) const; |
||||
|
void setSramTx (quint32& focusTypeNumber, SramTx* tx) const; |
||||
|
void setSramRx (QVector<quint8>& rxBeamFormerNumber, quint32& focusTypeNumber, SramRx* rx) const; |
||||
|
|
||||
|
}; |
||||
|
|
||||
|
#endif // SRAM_H
|
||||
@ -0,0 +1,97 @@ |
|||||
|
#ifndef INDEX_H |
||||
|
#define INDEX_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define SHOT_PROPERTIES_INDEX_MASK 0x00000000001FFFFF |
||||
|
#define RECEIVER_CONFIGURATION_INDEX_MASK 0x0000000000E00000 |
||||
|
#define PULSE_PROPERTIES_INDEX_MASK 0x0000000007000000 |
||||
|
#define FIRST_LINE_IN_FRAME_MASK 0x0000000008000000 |
||||
|
#define LAST_LINE_IN_FRAME_MASK 0x0000000010000000 |
||||
|
#define D_LINE_NUM_MASK 0x0000001FE0000000 |
||||
|
#define D_ENSEMBLE_NUM_MASK 0x000003E000000000 |
||||
|
#define FRAME_TYPE_MASK 0xFF00000000000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x0 |
||||
|
#define LENGTH 131072U |
||||
|
|
||||
|
class Index : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramIndex* _index; |
||||
|
const quint32 txBaseAddr; |
||||
|
const quint32 focusPropertiesSize; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
quint32 value(0); |
||||
|
|
||||
|
quint32 offsetAddr = txBaseAddr + (_index->shotPropertiesIndex[static_cast<qint32>(index)] - 1) * focusPropertiesSize; |
||||
|
shotPropertiesIndex->setValueLong(offsetAddr); |
||||
|
|
||||
|
receiverConfigurationIndex->setValueLong(_index->receiverConfigurationIndex[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
pulsePropertiesIndex->setValueLong(_index->pulsePropertiesIndex[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
value = _index->firstLineInFrame[static_cast<qint32>(index)] ? 1 : 0; |
||||
|
firstLineInFrame->setValueLong(value); |
||||
|
|
||||
|
value = _index->lastLineInFrame[static_cast<qint32>(index)] ? 1 : 0; |
||||
|
lastLineInFrame->setValueLong(value); |
||||
|
|
||||
|
dLineNum->setValueLong(_index->dLineNum[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
dEnsembleNum->setValueLong(_index->dEnsembleNum[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
if (index==0) |
||||
|
frameType->setValueLong(_index->frameType); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* shotPropertiesIndex; |
||||
|
Field* receiverConfigurationIndex; |
||||
|
Field* pulsePropertiesIndex; |
||||
|
Field* firstLineInFrame; |
||||
|
Field* lastLineInFrame; |
||||
|
Field* dLineNum; |
||||
|
Field* dEnsembleNum; |
||||
|
Field* frameType; |
||||
|
|
||||
|
void setIndex (SramIndex* index) |
||||
|
{ |
||||
|
_index = index; |
||||
|
} |
||||
|
|
||||
|
Index(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH), txBaseAddr(131072), focusPropertiesSize(27) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(shotPropertiesIndex, SHOT_PROPERTIES_INDEX_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(receiverConfigurationIndex, RECEIVER_CONFIGURATION_INDEX_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(pulsePropertiesIndex, PULSE_PROPERTIES_INDEX_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(firstLineInFrame, FIRST_LINE_IN_FRAME_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(lastLineInFrame, LAST_LINE_IN_FRAME_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(dLineNum, D_LINE_NUM_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(dEnsembleNum, D_ENSEMBLE_NUM_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(frameType, FRAME_TYPE_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef SHOT_PROPERTIES_INDEX_MASK |
||||
|
#undef PULSE_PROPERTIES_INDEX_MASK |
||||
|
#undef RECEIVER_CONFIGURATION_INDEX_MASK |
||||
|
#undef FIRST_LINE_IN_FRAME_MASK |
||||
|
#undef LAST_LINE_IN_FRAME_MASK |
||||
|
#undef D_LINE_NUM_MASK |
||||
|
#undef D_ENSEMBLE_NUM_MASK |
||||
|
#undef FRAME_TYPE_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
|
||||
|
#endif // INDEX_H
|
||||
@ -0,0 +1,69 @@ |
|||||
|
#ifndef RXPARAMS_H |
||||
|
#define RXPARAMS_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define RX_ACTIVE_ELEMENT_STEP_MASK 0x00000000000000FF |
||||
|
#define INTERCEPT_POINT_FIRING_TIME_MASK 0x00000000000FFF00 |
||||
|
#define RX_FOCUS_POINT_NUMBER_MASK 0x00000001FFF00000 |
||||
|
#define R0_POSITION_MASK 0x0003FFFE00000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100010 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
|
||||
|
class RxParams : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramRx* _rx; |
||||
|
QVector<quint32> rxActiveElementStepQ; |
||||
|
QVector<quint32> r0PositionQ; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
rxActiveElementStep->setValueLong(rxActiveElementStepQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
interceptPointFiringTime->setValueLong(_rx->interceptPointFiringTime[static_cast<qint32>(index)]); |
||||
|
|
||||
|
rxFocusPointNumber->setValueLong(_rx->rxFocusPointNumber[static_cast<qint32>(index)]) ; |
||||
|
|
||||
|
r0Position->setValueLong(r0PositionQ[static_cast<qint32>(index)]); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* rxActiveElementStep; |
||||
|
Field* interceptPointFiringTime; |
||||
|
Field* rxFocusPointNumber; |
||||
|
Field* r0Position; |
||||
|
|
||||
|
void setRxParams (SramRx* rx) |
||||
|
{ |
||||
|
_rx = rx; |
||||
|
rxActiveElementStepQ = Register::qntzr(_rx->rxActiveElementStep, 0, 8, 8, 0, true, false); |
||||
|
r0PositionQ = Register::qntzr(_rx->r0Position, 0, 17, 0, 0, true); |
||||
|
} |
||||
|
|
||||
|
RxParams(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxActiveElementStep, RX_ACTIVE_ELEMENT_STEP_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(interceptPointFiringTime, INTERCEPT_POINT_FIRING_TIME_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxFocusPointNumber, RX_FOCUS_POINT_NUMBER_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(r0Position, R0_POSITION_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef RX_ACTIVE_ELEMENT_STEP_MASK |
||||
|
#undef INTERCEPT_POINT_FIRING_TIME_MASK |
||||
|
#undef RX_FOCUS_POINT_NUMBER_MASK |
||||
|
#undef R0_POSITION_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
#endif // RXPARAMS_H
|
||||
@ -0,0 +1,72 @@ |
|||||
|
#ifndef RXPARAMSDEGREE_H |
||||
|
#define RXPARAMSDEGREE_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define THETA_COS_MASK 0x000000000000FFFF |
||||
|
#define THETA_SIN_MASK 0x00000000FFFF0000 |
||||
|
#define PHI_COS_MASK 0x0000FFFF00000000 |
||||
|
#define PHI_SIN_MASK 0xFFFF000000000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100018 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
class RxParamsDegree : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramRx* _rx; |
||||
|
QVector<quint32> thetaCosQ; |
||||
|
QVector<quint32> thetaSinQ; |
||||
|
QVector<quint32> phiCosQ; |
||||
|
QVector<quint32> phiSinQ; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
thetaCos->setValueLong(thetaCosQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
thetaSin->setValueLong(thetaSinQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
phiCos->setValueLong(phiCosQ[static_cast<qint32>(index)]) ; |
||||
|
|
||||
|
phiSin->setValueLong(phiSinQ[static_cast<qint32>(index)]); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* thetaCos; |
||||
|
Field* thetaSin; |
||||
|
Field* phiCos; |
||||
|
Field* phiSin; |
||||
|
|
||||
|
void setRxParamsDegree (SramRx* rx) |
||||
|
{ |
||||
|
_rx = rx; |
||||
|
thetaCosQ = Register::qntzr(_rx->thetaCos, 1, 16, 15, 0, true, true, true); |
||||
|
thetaSinQ = Register::qntzr(_rx->thetaSin, 1, 16, 15, 0, true, true, true); |
||||
|
phiCosQ = Register::qntzr(_rx->phiCos, 1, 16, 15, 0, true, true, true); |
||||
|
phiSinQ = Register::qntzr(_rx->phiSin, 1, 16, 15, 0, true, true, true); |
||||
|
} |
||||
|
|
||||
|
RxParamsDegree(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(thetaCos, THETA_COS_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(thetaSin, THETA_SIN_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(phiCos, PHI_COS_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(phiSin, PHI_SIN_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef THETA_COS_MASK |
||||
|
#undef THETA_SIN_MASK |
||||
|
#undef PHI_COS_MASK |
||||
|
#undef PHI_SIN_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
#endif // RXPARAMSDEGREE_H
|
||||
@ -0,0 +1,65 @@ |
|||||
|
#ifndef RXPARAMSDELAY_H |
||||
|
#define RXPARAMSDELAY_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define RX_R0_ACTIVE_ELEMENT_NUMBER_MASK 0x00000000000000FF |
||||
|
#define TX_R0_MIN_DELAYQ_MASK 0x0000000001FFFF00 |
||||
|
#define RX_R0_MIN_DELAYQ_MASK 0x000003FFFE000000 |
||||
|
#define RX_R0_MAX_DELAYQ_MASK 0x07FFFC0000000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100028 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
|
||||
|
class RxParamsDelay : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramRx* _rx; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
rxR0ActiveElementNumber->setValueLong(_rx->rxR0ActiveElementNumber[static_cast<qint32>(index)]); |
||||
|
|
||||
|
txR0MinDelayQ->setValueLong(_rx->txR0MinDelayQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
rxR0MinDelayQ->setValueLong(_rx->rxR0MinDelayQ[static_cast<qint32>(index)]) ; |
||||
|
|
||||
|
rxR0MaxDelayQ->setValueLong(_rx->rxR0MaxDelayQ[static_cast<qint32>(index)]); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* rxR0ActiveElementNumber; |
||||
|
Field* txR0MinDelayQ; |
||||
|
Field* rxR0MinDelayQ; |
||||
|
Field* rxR0MaxDelayQ; |
||||
|
|
||||
|
void setRxParamsDelay (SramRx* rx) |
||||
|
{ |
||||
|
_rx = rx; |
||||
|
} |
||||
|
|
||||
|
RxParamsDelay(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxR0ActiveElementNumber, RX_R0_ACTIVE_ELEMENT_NUMBER_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(txR0MinDelayQ, TX_R0_MIN_DELAYQ_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxR0MinDelayQ, RX_R0_MIN_DELAYQ_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxR0MaxDelayQ, RX_R0_MAX_DELAYQ_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef RX_R0_ACTIVE_ELEMENT_NUMBER_MASK |
||||
|
#undef TX_R0_MIN_DELAYQ_MASK |
||||
|
#undef RX_R0_MIN_DELAYQ_MASK |
||||
|
#undef RX_R0_MAX_DELAYQ_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
#endif // RXPARAMSDELAY_H
|
||||
@ -0,0 +1,71 @@ |
|||||
|
#ifndef RXPARAMSPOS_H |
||||
|
#define RXPARAMSPOS_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define RX_R0_CENTER_ACTIVE_ELEMENT_NUMBER_MASK 0x00000000000000FF |
||||
|
#define INTERCEPT_X_POS_MASK 0x0000000003FFFF00 |
||||
|
#define INTERCEPT_Y_POS_MASK 0x00000FFFFC000000 |
||||
|
#define INTERCEPT_Z_POS_MASK 0x1FFFF00000000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100020 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
|
||||
|
class RxParamsPos : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramRx* _rx; |
||||
|
QVector<quint32> interceptXPosQ; |
||||
|
QVector<quint32> interceptYPosQ; |
||||
|
QVector<quint32> interceptZPosQ; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
rxR0CenterActiveElementNumber->setValueLong(_rx->rxR0CenterActiveElementNumber[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
interceptXPos->setValueLong(interceptXPosQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
interceptYPos->setValueLong(interceptYPosQ[static_cast<qint32>(index)]) ; |
||||
|
|
||||
|
interceptZPos->setValueLong(interceptZPosQ[static_cast<qint32>(index)]); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* rxR0CenterActiveElementNumber; |
||||
|
Field* interceptXPos; |
||||
|
Field* interceptYPos; |
||||
|
Field* interceptZPos; |
||||
|
|
||||
|
void setRxParamsPos (SramRx* rx) |
||||
|
{ |
||||
|
_rx = rx; |
||||
|
interceptXPosQ = Register::qntzr(_rx->interceptXPos, 1, 18, 0, 0, true, true, true); |
||||
|
interceptYPosQ = Register::qntzr(_rx->interceptYPos, 1, 18, 0, 0, true, true, true); |
||||
|
interceptZPosQ = Register::qntzr(_rx->interceptZPos, 0, 17, 0, 0, true); |
||||
|
} |
||||
|
|
||||
|
RxParamsPos(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(rxR0CenterActiveElementNumber, RX_R0_CENTER_ACTIVE_ELEMENT_NUMBER_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(interceptXPos, INTERCEPT_X_POS_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(interceptYPos, INTERCEPT_Y_POS_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(interceptZPos, INTERCEPT_Z_POS_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef RX_R0_CENTER_ACTIVE_ELEMENT_NUMBER_MASK |
||||
|
#undef INTERCEPT_X_POS_MASK |
||||
|
#undef INTERCEPT_Y_POS_MASK |
||||
|
#undef INTERCEPT_Z_POS_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
#endif // RXPARAMSPOS_H
|
||||
@ -0,0 +1,52 @@ |
|||||
|
#ifndef SRAMSTRUCTURES_H |
||||
|
#define SRAMSTRUCTURES_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
|
||||
|
struct SramIndex { |
||||
|
QVector<quint32> shotPropertiesIndex; |
||||
|
QVector<quint32> receiverConfigurationIndex; |
||||
|
QVector<quint32> pulsePropertiesIndex; |
||||
|
QVector<bool> firstLineInFrame; |
||||
|
QVector<bool> lastLineInFrame; |
||||
|
QVector<quint32> dLineNum; |
||||
|
QVector<quint32> dEnsembleNum; |
||||
|
quint8 frameType; |
||||
|
}; |
||||
|
|
||||
|
|
||||
|
struct SramRx { |
||||
|
QVector<float> rxActiveElementStep; |
||||
|
QVector<quint32> interceptPointFiringTime; |
||||
|
QVector<quint32> rxFocusPointNumber; |
||||
|
QVector<float> r0Position; |
||||
|
|
||||
|
QVector<float> thetaCos; |
||||
|
QVector<float> thetaSin; |
||||
|
QVector<float> phiCos; |
||||
|
QVector<float> phiSin; |
||||
|
|
||||
|
QVector<quint32> rxR0CenterActiveElementNumber; |
||||
|
QVector<float> interceptXPos; |
||||
|
QVector<float> interceptYPos; |
||||
|
QVector<float> interceptZPos; |
||||
|
|
||||
|
QVector<quint32> rxR0ActiveElementNumber; |
||||
|
QVector<quint32> txR0MinDelayQ; |
||||
|
QVector<quint32> rxR0MinDelayQ; |
||||
|
QVector<quint32> rxR0MaxDelayQ; |
||||
|
}; |
||||
|
|
||||
|
struct SramTx { |
||||
|
QVector<float> txFocusXPos; |
||||
|
QVector<float> txFocusYPos; |
||||
|
QVector<float> txFocusZPos; |
||||
|
|
||||
|
QVector<quint32> txStartActiveElementNumber; |
||||
|
QVector<quint32> txActiveElementNumber; |
||||
|
QVector<float> pulseInterval; |
||||
|
QVector<quint32> maxDelayQ; |
||||
|
}; |
||||
|
|
||||
|
#endif // SRAMSTRUCTURES_H
|
||||
@ -0,0 +1,66 @@ |
|||||
|
#ifndef TXPARAMS_H |
||||
|
#define TXPARAMS_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define TX_START_ACTIVE_ELEMENT_NUMBER_MASK 0x00000000000000FF |
||||
|
#define TX_ACTIVE_ELEMENT_NUMBER_MASK 0x000000000000FF00 |
||||
|
#define PULSE_INTERVAL_MASK 0x00000003FFFF0000 |
||||
|
#define MAX_DELAYQ_MASK 0x0007FFFC00000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100000 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
|
||||
|
class TxParams : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramTx* _tx; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
txStartActiveElementNumber->setValueLong(_tx->txStartActiveElementNumber[static_cast<qint32>(index)] - 1); |
||||
|
|
||||
|
txActiveElementNumber->setValueLong(_tx->txActiveElementNumber[static_cast<qint32>(index)]); |
||||
|
|
||||
|
pulseInterval->setValueLong(static_cast<quint32>(_tx->pulseInterval[static_cast<qint32>(index)])) ; |
||||
|
|
||||
|
maxDelayQ->setValueLong(_tx->maxDelayQ[static_cast<qint32>(index)]); |
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* txStartActiveElementNumber; |
||||
|
Field* txActiveElementNumber; |
||||
|
Field* pulseInterval; |
||||
|
Field* maxDelayQ; |
||||
|
|
||||
|
void setTxParams (SramTx* tx) |
||||
|
{ |
||||
|
_tx = tx; |
||||
|
} |
||||
|
|
||||
|
TxParams(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(txStartActiveElementNumber, TX_START_ACTIVE_ELEMENT_NUMBER_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(txActiveElementNumber, TX_ACTIVE_ELEMENT_NUMBER_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(pulseInterval, PULSE_INTERVAL_MASK ); |
||||
|
ADD_UNSIGNED_FIELD_LONG(maxDelayQ, MAX_DELAYQ_MASK ); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef TX_START_ACTIVE_ELEMENT_NUMBER_MASK |
||||
|
#undef TX_ACTIVE_ELEMENT_NUMBER_MASK |
||||
|
#undef PULSE_INTERVAL_MASK |
||||
|
#undef MAX_DELAYQ_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
|
||||
|
#endif // TXPARAMS_H
|
||||
@ -0,0 +1,65 @@ |
|||||
|
#ifndef TXPARAMSFOCUS_H |
||||
|
#define TXPARAMSFOCUS_H |
||||
|
|
||||
|
#include "model/hardware/core/register/Register.h" |
||||
|
#include "model/hardware/core/register/RegUtils.h" |
||||
|
#include "SramStructures.h" |
||||
|
|
||||
|
#undef BAR |
||||
|
|
||||
|
#define TX_FOCUS_X_POS_MASK 0x000000000003FFFF |
||||
|
#define TX_FOCUS_Y_POS_MASK 0x0000000FFFFC0000 |
||||
|
#define TX_FOCUS_Z_POS_MASK 0x001FFFF000000000 |
||||
|
|
||||
|
#define BAR 1U |
||||
|
#define OFFSET 0x100008 |
||||
|
#define LENGTH 11264U |
||||
|
|
||||
|
class TxParamsFocus : public Register |
||||
|
{ |
||||
|
private: |
||||
|
SramTx* _tx; |
||||
|
QVector<quint32> txFocusXPosQ; |
||||
|
QVector<quint32> txFocusYPosQ; |
||||
|
QVector<quint32> txFocusZPosQ; |
||||
|
|
||||
|
void prepareData(quint32 index) override |
||||
|
{ |
||||
|
txFocusXPos->setValueLong(txFocusXPosQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
txFocusYPos->setValueLong(txFocusYPosQ[static_cast<qint32>(index)]); |
||||
|
|
||||
|
txFocusZPos->setValueLong(txFocusZPosQ[static_cast<qint32>(index)]) ; |
||||
|
|
||||
|
} |
||||
|
|
||||
|
public: |
||||
|
Field* txFocusXPos; |
||||
|
Field* txFocusYPos; |
||||
|
Field* txFocusZPos; |
||||
|
|
||||
|
void setTxParamsFocus (SramTx* tx) |
||||
|
{ |
||||
|
_tx = tx; |
||||
|
txFocusXPosQ = Register::qntzr(_tx->txFocusXPos, 1, 18, 0, 0, true, true, true); |
||||
|
txFocusYPosQ = Register::qntzr(_tx->txFocusYPos, 1, 18, 0, 0, true, true, true); |
||||
|
txFocusZPosQ = Register::qntzr(_tx->txFocusZPos, 0, 17, 0, 0, true); |
||||
|
} |
||||
|
|
||||
|
TxParamsFocus(SonoDevice* device) : Register(BAR, OFFSET, device, LENGTH) |
||||
|
{ |
||||
|
ADD_UNSIGNED_FIELD_LONG(txFocusXPos, TX_FOCUS_X_POS_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(txFocusYPos, TX_FOCUS_Y_POS_MASK); |
||||
|
ADD_UNSIGNED_FIELD_LONG(txFocusZPos, TX_FOCUS_Z_POS_MASK); |
||||
|
} |
||||
|
}; |
||||
|
|
||||
|
#undef TX_FOCUS_X_POS_MASK |
||||
|
#undef TX_FOCUS_Y_POS_MASK |
||||
|
#undef TX_FOCUS_Z_POS_MASK |
||||
|
|
||||
|
#undef BAR |
||||
|
#undef OFFSET |
||||
|
#undef LENGTH |
||||
|
|
||||
|
#endif // TXPARAMSFOCUS_H
|
||||
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,59 @@ |
|||||
|
#include "model/hardware/core/register/emulator/Emulator.h" |
||||
|
|
||||
|
Emulator::Emulator(SonoDevice *device) |
||||
|
{ |
||||
|
_ramAddr = new RamAddress (device); |
||||
|
_transMode = new TransferMode (device); |
||||
|
_transRate = new TransferRate (device); |
||||
|
_emulAct = new EmulatorActivation (device); |
||||
|
} |
||||
|
|
||||
|
Emulator::~Emulator() |
||||
|
{ |
||||
|
delete _ramAddr; |
||||
|
delete _transMode; |
||||
|
delete _transRate; |
||||
|
delete _emulAct; |
||||
|
} |
||||
|
|
||||
|
void Emulator::setEmulatorEn() const |
||||
|
{ |
||||
|
this->_emulAct->emulatorActivation->setValue(EMULATOR_ENABLE); |
||||
|
this->_emulAct->update(); |
||||
|
} |
||||
|
|
||||
|
void Emulator::setEmulatorDis() const |
||||
|
{ |
||||
|
this->_emulAct->emulatorActivation->setValue(EMULATOR_DISABLE); |
||||
|
this->_emulAct->update(); |
||||
|
} |
||||
|
|
||||
|
void Emulator::setTransferMode(bool option, bool mode, quint32 length) const |
||||
|
{ |
||||
|
quint32 value(0); |
||||
|
|
||||
|
value = option ? 1:0; |
||||
|
this->_transMode->emulOption->setValue(value); |
||||
|
|
||||
|
value = mode ? 1:0; |
||||
|
this->_transMode->emulMode->setValue(value); |
||||
|
this->_transMode->transferLength->setValue(length); |
||||
|
this->_transMode->update(); |
||||
|
} |
||||
|
|
||||
|
void Emulator::setRamOffsetAddress(quint32 offset) const |
||||
|
{ |
||||
|
this->_ramAddr->ramBufAddr->setValue(offset); |
||||
|
this->_ramAddr->update(); |
||||
|
} |
||||
|
|
||||
|
|
||||
|
|
||||
|
void Emulator::setTransferRate(float rate) const |
||||
|
{ |
||||
|
quint32 realRate = static_cast<quint32>(rate * 1E5f); |
||||
|
this->_transRate->transferRate->setValue(realRate); |
||||
|
this->_transRate->update(); |
||||
|
|
||||
|
} |
||||
|
|
||||
@ -0,0 +1,74 @@ |
|||||
|
#include "model/hardware/core/register/misc/Misc.h" |
||||
|
|
||||
|
Misc::Misc(SonoDevice *device) : _offsetMaster(0), _offsetSlave0(0x50002C), _offsetSlave1(0x90002C), _offsetSlave2(0xD0002C) |
||||
|
{ |
||||
|
_s0Version = new FpgaVersion (device, _offsetSlave0); |
||||
|
_s1Version = new FpgaVersion (device, _offsetSlave1); |
||||
|
_s2Version = new FpgaVersion (device, _offsetSlave2); |
||||
|
_mVersion = new FpgaVersion (device, _offsetMaster); |
||||
|
_status = new StatusVector (device); |
||||
|
_gt = new GtSendMode (device); |
||||
|
_sync = new SyncMode (device); |
||||
|
} |
||||
|
|
||||
|
Misc::~Misc() |
||||
|
{ |
||||
|
delete _s0Version; |
||||
|
delete _s1Version; |
||||
|
delete _s2Version; |
||||
|
delete _mVersion; |
||||
|
delete _status; |
||||
|
delete _sync; |
||||
|
delete _gt; |
||||
|
} |
||||
|
|
||||
|
template<class T> |
||||
|
quint32 Misc::getVersion(T *version) const |
||||
|
{ |
||||
|
version->sync(); |
||||
|
return version->synthesisTime->getValue(); |
||||
|
} |
||||
|
|
||||
|
void Misc::getStatusVector(StatusVec *status) const |
||||
|
{ |
||||
|
this->_status->sync(); |
||||
|
|
||||
|
status->pgErr = ((this->_status->pgErr->getValue()) != 0); |
||||
|
status->fanFault = ((this->_status->fanFault->getValue()) != 0); |
||||
|
status->mpsErr = ((this->_status->mpsErr->getValue()) != 0); |
||||
|
status->pulserThd = ((this->_status->pulserThd->getValue()) != 0); |
||||
|
status->scenGtErr = ((this->_status->scenGtErr->getValue()) != 0); |
||||
|
status->syncFifoErr = ((this->_status->syncFifoErr->getValue()) != 0); |
||||
|
status->scenPriErr = ((this->_status->scenPriErr->getValue()) != 0); |
||||
|
status->syncPointErr = ((this->_status->syncPointErr->getValue()) != 0); |
||||
|
status->thermalErr = ((this->_status->thermalErr->getValue()) != 0); |
||||
|
status->scenSramErr = ((this->_status->scenSramErr->getValue()) != 0); |
||||
|
status->dintrlvFifoErr = ((this->_status->dintrlvFifoErr->getValue()) != 0); |
||||
|
status->dintrlvPointErr = ((this->_status->dintrlvPointErr->getValue()) != 0); |
||||
|
status->sram1ParityErr = ((this->_status->sram1ParityErr->getValue()) != 0); |
||||
|
status->sram2ParityErr = ((this->_status->sram2ParityErr->getValue()) != 0); |
||||
|
status->dmaCtrlTransferErr = ((this->_status->dmaCtrlTransferErr->getValue()) != 0); |
||||
|
status->emulDmaTransferErr = ((this->_status->emulDmaTransferErr->getValue()) != 0); |
||||
|
status->probeDisconnectErr = ((this->_status->probeDisconnectErr->getValue()) != 0); |
||||
|
status->probeDetChanInterrupt = ((this->_status->probeDetChanInterrupt->getValue()) != 0); |
||||
|
} |
||||
|
|
||||
|
void Misc::setGtSendMode(eGtSendCtrl gtMode) const |
||||
|
{ |
||||
|
this->_gt->gtSendModeCtrl->setValue(gtMode); |
||||
|
this->_gt->update(); |
||||
|
} |
||||
|
|
||||
|
void Misc::setSyncMode(eSyncCtrl syncMode) const |
||||
|
{ |
||||
|
this->_sync->syncMode->setValue(syncMode); |
||||
|
this->_sync->update(); |
||||
|
} |
||||
|
|
||||
|
void Misc::getFpgaVersion(FpgaCodeVersion *version) const |
||||
|
{ |
||||
|
version->masterCode = this->getVersion<FpgaVersion>(_mVersion); |
||||
|
version->slave0Code = this->getVersion<FpgaVersion>(_s0Version); |
||||
|
version->slave1Code = this->getVersion<FpgaVersion>(_s1Version); |
||||
|
version->slave2Code = this->getVersion<FpgaVersion>(_s2Version); |
||||
|
} |
||||
@ -0,0 +1,72 @@ |
|||||
|
#include "model/hardware/core/register/sram/Sram.h" |
||||
|
|
||||
|
Sram::Sram(SonoDevice *device) |
||||
|
{ |
||||
|
_index = new Index (device); |
||||
|
_tx = new TxParams (device); |
||||
|
_txFocus = new TxParamsFocus (device); |
||||
|
_rx = new RxParams (device); |
||||
|
_rxDegree = new RxParamsDegree(device); |
||||
|
_rxPos = new RxParamsPos (device); |
||||
|
_rxDelay = new RxParamsDelay (device); |
||||
|
} |
||||
|
|
||||
|
Sram::~Sram() |
||||
|
{ |
||||
|
delete _index; |
||||
|
delete _tx; |
||||
|
delete _txFocus; |
||||
|
delete _rx; |
||||
|
delete _rxDegree; |
||||
|
delete _rxPos; |
||||
|
delete _rxDelay; |
||||
|
} |
||||
|
|
||||
|
void Sram::setSramIndex(quint32 &totalTxShotNumber, SramIndex *index) const |
||||
|
{ |
||||
|
this->_index->setIndex(index); |
||||
|
this->_index->updateArrayLong(INDEX_INTERVAL, totalTxShotNumber); |
||||
|
} |
||||
|
|
||||
|
void Sram::setSramTx(quint32 &focusTypeNumber, SramTx *tx) const |
||||
|
{ |
||||
|
this->_tx->setTxParams(tx); |
||||
|
this->_tx->updateArrayLong(TX_RX_INTERVAL, focusTypeNumber); |
||||
|
|
||||
|
this->_txFocus->setTxParamsFocus(tx); |
||||
|
this->_txFocus->updateArrayLong(TX_RX_INTERVAL, focusTypeNumber); |
||||
|
} |
||||
|
|
||||
|
void Sram::setSramRx(QVector<quint8> &rxBeamFormerNumber, quint32 &focusTypeNumber, SramRx *rx) const |
||||
|
{ |
||||
|
this->_rx->setRxParams(rx); |
||||
|
this->_rx->updateArrayLong(TX_RX_INTERVAL, focusTypeNumber); |
||||
|
|
||||
|
quint32 rxDegreeBaseOffset = this->_rxDegree->getCurrentOffset(); |
||||
|
quint32 rxPosBaseOffset = this->_rxPos->getCurrentOffset(); |
||||
|
quint32 rxDelayBaseOffset = this->_rxDelay->getCurrentOffset(); |
||||
|
|
||||
|
for (quint32 i=0; i < focusTypeNumber; i++) |
||||
|
{ |
||||
|
this->_rxDegree->setRxParamsDegree(rx); |
||||
|
this->_rxDegree->updateArrayLong(INNER_RX_INTERVAL, rxBeamFormerNumber.at(static_cast<qint32>(i))); |
||||
|
quint32 rxDegreeCurOffset = this->_rxDegree->getCurrentOffset(); |
||||
|
this->_rxDegree->changeOffset(rxDegreeCurOffset + TX_RX_INTERVAL); |
||||
|
|
||||
|
this->_rxPos->setRxParamsPos(rx); |
||||
|
this->_rxPos->updateArrayLong(INNER_RX_INTERVAL, rxBeamFormerNumber.at(static_cast<qint32>(i))); |
||||
|
quint32 rxPosCurOffset = this->_rxPos->getCurrentOffset(); |
||||
|
this->_rxPos->changeOffset(rxPosCurOffset + TX_RX_INTERVAL); |
||||
|
|
||||
|
this->_rxDelay->setRxParamsDelay(rx); |
||||
|
this->_rxDelay->updateArrayLong(INNER_RX_INTERVAL, rxBeamFormerNumber.at(static_cast<qint32>(i))); |
||||
|
quint32 rxDelayCurOffset = this->_rxDelay->getCurrentOffset(); |
||||
|
this->_rxDelay->changeOffset(rxDelayCurOffset + TX_RX_INTERVAL); |
||||
|
} |
||||
|
|
||||
|
this->_rxDegree->changeOffset(rxDegreeBaseOffset); // return to base offset address
|
||||
|
this->_rxPos->changeOffset(rxPosBaseOffset); // return to base offset address
|
||||
|
this->_rxDelay->changeOffset(rxDelayBaseOffset ); // return to base offset address
|
||||
|
} |
||||
|
|
||||
|
|
||||
Loading…
Reference in new issue