init files

api.cpp

@@ -0,0 +1,62 @@
+#include "api.h"
+
+/*************************************************************************************************/
+UltraSoundDevice::UltraSoundDevice()
+{
+    device = new SonoDevice();
+    device->init();
+}
+
+/*************************************************************************************************/
+UltraSoundDevice::~UltraSoundDevice()
+{
+
+}
+
+/*************************************************************************************************/
+uint8_t UltraSoundDevice::readByte(uint32_t address, uint32_t bar)
+{
+    return device->device.readByte(bar, address);
+}
+
+/*************************************************************************************************/
+uint16_t UltraSoundDevice::readShort(uint32_t address, uint32_t bar)
+{
+    return device->device.readShort(bar, address);
+}
+
+/*************************************************************************************************/
+uint32_t UltraSoundDevice::readWord(uint32_t address, uint32_t bar)
+{
+    return device->device.readWord(bar, address);
+}
+
+/*************************************************************************************************/
+uint64_t UltraSoundDevice::readLong(uint32_t address, uint32_t bar)
+{
+    return device->device.readLong(bar, address);
+}
+
+/*************************************************************************************************/
+void UltraSoundDevice::writeByte(uint32_t address, uint32_t bar, uint8_t data)
+{
+    device->device.writeByte(bar, address, data);
+}
+
+/*************************************************************************************************/
+void UltraSoundDevice::writeShort(uint32_t address, uint32_t bar, uint16_t data)
+{
+    device->device.writeShort(bar, address, data);
+}
+
+/*************************************************************************************************/
+void UltraSoundDevice::writeWord(uint32_t address, uint32_t bar, uint32_t data)
+{
+    device->device.writeWord(bar, address, data);
+}
+
+/*************************************************************************************************/
+void UltraSoundDevice::writeLong(uint32_t address, uint32_t bar, uint64_t data)
+{
+    device->device.writeLong(bar, address, data);
+}

api.h

@@ -0,0 +1,37 @@
+#include "stdint.h"
+#include <exception>
+
+#include "model/hardware/device/SonoDevice.h"
+
+class myexception: public std::exception
+{
+private:
+    char* _message;
+public:
+  myexception(char* message) { _message = message; }
+  virtual const char* what() const noexcept
+  {
+    return _message;
+  }
+};
+
+class UltraSoundDevice 
+{
+public:
+  UltraSoundDevice();
+  ~UltraSoundDevice();
+
+  SonoDevice* device;
+
+  uint8_t readByte(uint32_t address, uint32_t bar);
+  uint16_t readShort(uint32_t address, uint32_t bar);
+  uint32_t readWord(uint32_t address, uint32_t bar);
+  uint64_t readLong(uint32_t address, uint32_t bar);
+
+  void writeByte(uint32_t address, uint32_t bar, uint8_t data);
+  void writeShort(uint32_t address, uint32_t bar, uint16_t data);
+  void writeWord(uint32_t address, uint32_t bar, uint32_t data);
+  void writeLong(uint32_t address, uint32_t bar, uint64_t data);
+};
+
+

developHw.pro

@@ -0,0 +1,39 @@
+QT       += core gui printsupport
+
+greaterThan(QT_MAJOR_VERSION, 4): QT += widgets
+
+CONFIG += c++11
+
+# The following define makes your compiler emit warnings if you use
+# any Qt feature that has been marked deprecated (the exact warnings
+# depend on your compiler). Please consult the documentation of the
+# deprecated API in order to know how to port your code away from it.
+DEFINES += QT_DEPRECATED_WARNINGS
+
+# You can also make your code fail to compile if it uses deprecated APIs.
+# In order to do so, uncomment the following line.
+# You can also select to disable deprecated APIs only up to a certain version of Qt.
+#DEFINES += QT_DISABLE_DEPRECATED_BEFORE=0x060000    # disables all the APIs deprecated before Qt 6.0.0
+
+SOURCES += \
+    main.cpp \
+    mainwindow.cpp \
+    api.cpp \
+    $$files(src/*.cpp, true) \
+
+HEADERS += \
+    mainwindow.h    \
+    api.h           \
+    $$files(include/*.h, true)
+
+INCLUDEPATH += "$$PWD/include"
+
+FORMS += \
+    mainwindow.ui
+
+# Default rules for deployment.
+qnx: target.path = /tmp/$${TARGET}/bin
+else: unix:!android: target.path = /opt/$${TARGET}/bin
+!isEmpty(target.path): INSTALLS += target
+
+unix|win32: LIBS += -lSonoPcieDevice

developHw.pro.user

@@ -0,0 +1,336 @@
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include/model/hardware/core/TrxBoard.h

@@ -0,0 +1,180 @@
+#ifndef TRXBOARD_H
+#define TRXBOARD_H
+
+#include <QVector>
+#include <QString>
+
+#include "model/hardware/core/register/clockDistributer/ClockDistributer.h"
+#include "model/hardware/core/register/boardsCtrlMngt/BoardsCtrlMngt.h"
+#include "model/hardware/core/register/fpgaProgram/FpgaProgram.h"
+#include "model/hardware/core/register/builtInTest/BuiltInTest.h"
+#include "model/hardware/core/register/beamFormer/BeamFormer.h"
+#include "model/hardware/core/register/scenPlayer/ScenPlayer.h"
+#include "model/hardware/core/register/bpiFlash/BpiFlash.h"
+#include "model/hardware/core/register/dsp/Dsp.h"
+#include "model/hardware/core/dmaCtrl/DmaCtrl.h"
+#include "model/hardware/device/SonoDevice.h"
+
+#define  SLAVE_ELEMENT_SEGMENT      64U
+#define  TOTAL_SCEN_LUT_SRAM        5U //without sram
+#define  SLAVE_FPGA_NUMBER          3U
+#define  CLOCK_DIVISION             0x55
+
+#define  EEPROM_ID_BYTE_BEGIN       0U
+#define  EEPROM_ID_BYTE_NUMBER      4U
+#define  EEPROM_INFO_BYTE_BEGIN     100U
+#define  EEPROM_INFO_BYTE_NUMBER    5U
+
+
+struct ProbeElementPosition
+{
+    QList<quint32> xPosition;
+    QList<quint32> yPosition;
+    QList<quint32> zPosition;
+};
+
+struct HealthStatus
+{
+    float systemTemperature;
+    float criticalComponentTemperature;
+    AdcVoltages* adcMon;
+    VoltagesPg*  voltsPg;
+};
+
+enum eSelectProbe : quint8
+{
+    prbA = 1,
+    prbB,
+    prbC,
+    prbD,
+};
+
+class TrxBoard
+{
+private:
+    QVector<quint8> _swapVec;
+    const quint32   _offsetSlave0;
+    const quint32   _offsetSlave1;
+    const quint32   _offsetSlave2;
+    bool _allow;
+
+    SonoDevice  _device;
+
+    ClockDistributer*   _clkDistributer;
+    BoardsCtrlMngt*     _bCtrlMngt;
+    FpgaProgram*        _fpgaProgram;
+    BeamFormer*         _beamFormerSlave0;
+    BeamFormer*         _beamFormerSlave1;
+    BeamFormer*         _beamFormerSlave2;
+    ScenPalyer*         _scenPlayer;
+    BpiFlash*           _bpiFlash;
+    DmaCtrl*            _dmaCtrl;
+    Dsp*                _dsp;
+
+    enum eScenParams : quint8
+    {
+        clear,
+        set
+    };
+
+    void scenParamsFilling(eScenParams cmd);
+    void setSwapVector (void);
+
+
+
+
+
+    /////////////////////////// Old TRX ///////////////////////////
+    QString _name;
+    QString _version;
+    int _swCounter;
+    int _hwCounter;
+    bool _run;
+
+public:
+    TrxBoard();
+    ~TrxBoard();
+
+    ///////////////////////////////// BeamFormer API ///////////////////////////////
+    void scenRxBeamformerProperties (RxBeamformerProperties* rxBeamformer);
+    void scenProbeElementPosition (ProbeElementPosition* element);
+    void scenApodizationLut (QList<QList<quint32>>& apodization);
+    void scenPulseProperties (PulseProperties* pulse);
+    void scenAfeLut (AfeProperties* afe);
+
+    //////////////////////////////////// DSP API ///////////////////////////////////
+    void scenReceiverConfigurationLut (ReceiverConfiguration* configLut) const;
+    void scenLineFilterCoefficient (QList<quint32>& lineFilterLut) const;
+    void scenBlendWeight (QList<QList<quint32>>& blendWeight) const;
+    void scenAtgcLut (QList<QList<quint32>>& atgcLut) const;
+    void scenStbCoefficient (QList<quint32>& stbLut) const;
+    void setAtgcMode (eAtgcMode mode, quint16 value) const;
+    void scenFrequencyLut (QList<quint32>& freqLut) const;
+    void scenLpfLut (QList<QList<quint32>>& lpfLut) const;
+    void scenDtgcLut (QList<quint32>& dtgcLut) const;
+
+    ////////////////////////////// Slave Programming API ///////////////////////////
+    void slaveFpgaProgram (QString path);
+
+    /////////////////////////////// BeamFormer Mode API ////////////////////////////
+    void setBeamFormerMode (eClkMode mode) const;
+
+    /////////////////////////////// Scenario Player API ////////////////////////////
+    void setScenPlayerIndex (quint32& startIdx, quint32& endIdx) const;
+    void scenPlayerStart (bool start) const;
+    void scenPlayerPause (bool pause) const;
+    void scenPlayerStop  (bool stop) const;
+
+    ///////////////////////////////// Sram Fill API ////////////////////////////////
+    void sramWrite(QList<quint64>& data, quint32 offsetAddr);
+
+    ///////////////////////////////// Emulator API /////////////////////////////////
+    void emulatorInit(EmulatorProperties* config) const;
+    void emulatorStart(bool start) const;
+    void emulatorStop(bool stop) const;
+
+    ////////////////////////////// BoardCtrlMngt API ///////////////////////////////
+    quint32 deviceId (void) const;
+    quint32 vendorId (void) const;
+
+    quint32 trxId (void) const;
+    quint32 mpsId (void) const;
+    quint32 prbCtrlId (void) const;
+    quint32 prbId (quint8 prbSel) const;
+    QList<quint32> getConnectedPrbId (void) const;
+
+    QString trxInfo (void) const;
+    QString mpsInfo (void) const;
+    QString prbCtrlInfo (void) const;
+    QString prbInfo (quint8 prbSel) const;
+    QList<QString> getConnectedPrbInfo (void) const;
+
+    void supervisorRbValue(SupervisorRbValue* sValue) const;
+    void mpsFaultStatus (MpsFaultStatus* faultStatus) const;
+    void mpsReset (void) const;
+    void mpsSetAo (float voltA, float voltB) const;
+
+    void selectProbe (eSelectProbe prbSel) const;
+    void getHealthStatus (HealthStatus* healStat) const;
+    void init (void) const;
+
+    //////////////////////////////// BPI Flash API /////////////////////////////////
+    void mcsProgram (QString path);
+    void mcsVerify (QString path) const;
+
+
+    ///////////////////////////////// Old TRX //////////////////////////////////////
+    //HardwarePacketEngine packetEngine;
+    QString getName();
+    QString getVersion();
+    bool selfTest();
+    bool updateInfo();
+    bool updateStatus();
+    void readData();
+    void start();
+    void stop();
+
+};
+//bool TrxBoard::_allow = false;
+
+#endif // TRXBOARD_H

include/model/hardware/core/dmaCtrl/DmaCtrl.h

@@ -0,0 +1,30 @@
+#ifndef DMACTRL_H
+#define DMACTRL_H
+
+#include "model/hardware/device/SonoDevice.h"
+//#include "model/hardware/service/HardwarePacketEngine.h"
+
+struct EmulatorProperties
+{
+    EmulatorProperties();
+
+};
+
+class DmaCtrl
+{
+private:
+    SonoDevice* _device;
+    void startTransfer(bool emulatorEn);
+    void stopTransfer();
+    void setRamOffsetAddress(qint32 offset);
+    void setTransferLength(qint32 length);
+    void setTransferRate(float rate);
+    void setOptions(bool performanceMode);
+    void setMode(bool dynamicMode);
+
+public:
+    DmaCtrl();
+    void dmaTransactionMode(bool emulActive) const;
+};
+
+#endif // DMACTRL_H

include/model/hardware/core/register/Field.h

@@ -0,0 +1,38 @@
+#ifndef FIELD_H
+#define FIELD_H
+
+#include <QObject>
+
+class Field
+{
+private:
+	quint32 _value;
+	quint32 _mask;
+	quint8 _length;
+	quint8 _position;
+	quint32 _zeroBasedMask;
+
+	bool _isSigned;
+	bool _isUpdated;
+
+	Field(quint32 mask, bool isSigned);
+
+	void findLength();
+	void findPosition();
+	void findZeroBasedMask();
+
+public:
+	static Field* fromBitPosition(quint32 bitPosition);
+	static Field* fromMaskSigned(quint32 mask);
+	static Field* fromMaskUnsigned(quint32 mask);
+
+	quint32 getValue();
+	void setValue(quint32 value);
+
+	bool isUpdated();
+
+	void updateValue(quint32 value);
+	quint32 getRegisterWriteValue();
+};
+
+#endif //FIELD_H

include/model/hardware/core/register/RegUtils.h

@@ -0,0 +1,24 @@
+#ifndef REGUTILS_H
+#define REGUTILS_H
+
+#include "Register.h"
+
+#define ADD_UNSIGNED_FIELD(NAME, MASK) \
+	do { \
+		NAME = Field::fromMaskUnsigned(MASK); \
+		_fields.append(NAME); \
+	} while(0)
+
+#define ADD_SIGNED_FIELD(NAME, MASK) \
+	do { \
+		NAME = Field::fromMaskSigned(MASK); \
+		_fields.append(NAME); \
+	} while(0)
+
+#define ADD_BIT_FIELD(NAME, MASK) \
+	do { \
+		NAME = Field::fromBitPosition(MASK); \
+		_fields.append(NAME); \
+	} while(0)
+
+#endif //REGUTILS_H

include/model/hardware/core/register/Register.h

@@ -0,0 +1,49 @@
+#ifndef REGISTER_H
+#define REGISTER_H
+
+#include "model/hardware/core/register/Field.h"
+#include "model/hardware/device/SonoDevice.h"
+
+class Register
+{
+//private:
+//    virtual void prepareData(quint32 index);
+//    virtual void receiveData(void);
+
+protected:
+    quint32 _bar;
+    quint32 _offset;
+    quint32 _baseOffset;
+
+    quint32 _arrayLength;
+    quint8  _arrayDepth;
+
+    quint32 _value;
+
+    bool _isUpdated;
+
+    QList<Field*> _fields;
+
+    SonoDevice* _device;
+
+public:
+    //Register(quint8 bar, quint32 offset, SonoDevice* device, quint32 arrayLength=0);   // Constructor for general Registers: single and array
+    Register(quint8 bar, quint32 offset, SonoDevice* device);
+    virtual ~Register();
+
+    quint32 getValue();
+    void setValue(quint32 value);
+
+    void changeOffset(quint32 offset);
+    quint32 getCurrentOffset (void) const;
+
+    bool isUpdated();
+
+    void update();
+    void upadteArray();
+
+    void sync();
+    void syncArray();
+};
+
+#endif //rEGISTER_H

include/model/hardware/core/register/RegisterChain.h

@@ -0,0 +1,49 @@
+#ifndef REGISTERCHAIN_H
+#define REGISTERCHAIN_H
+
+#include "model/hardware/core/register/Field.h"
+#include "model/hardware/device/SonoDevice.h"
+
+class RegisterChain
+{
+private:
+    virtual void prepareData(quint32 index)=0;
+    //virtual void receiveData(void);
+
+protected:
+    quint32 _bar;
+    quint32 _offset;
+    quint32 _baseOffset;
+
+    quint32 _arrayLength;
+    quint8  _arrayDepth;
+
+    quint32 _value;
+
+    bool _isUpdated;
+
+    QList<Field*> _fields;
+
+    SonoDevice* _device;
+
+public:
+    RegisterChain(quint8 bar, quint32 offset, SonoDevice* device, quint32 arrayLength);   // Constructor for general Registers: single and array
+    virtual ~RegisterChain();
+
+    quint32 getValue();
+    void setValue(quint32 value);
+
+    void changeOffset(quint32 offset);
+    quint32 getCurrentOffset (void) const;
+
+    bool isUpdated();
+
+    void update();
+    void upadteArray();
+
+    void sync();
+    void syncArray();
+};
+
+
+#endif // REGISTERCHAIN_H

include/model/hardware/core/register/beamFormer/BeamFormer.h

@@ -0,0 +1,36 @@
+#ifndef BEAMFORMER_H
+#define BEAMFORMER_H
+
+#include "registerDefinition/ElementPositionLut.h"
+#include "registerDefinition/RxBeamformerLut.h"
+#include "registerDefinition/ApodizationLut.h"
+#include "registerDefinition/RegValid.h"
+#include "registerDefinition/PulseLut.h"
+#include "registerDefinition/AfeLut.h"
+
+#define APODIZATION_OFFSET          0x4000
+#define ELEMENT_POSITION_OFFSET     0x400
+
+class BeamFormer
+{
+private:
+    ElementPositionLut*     _elementPosition;
+    RxBeamformerLut*        _rxBeamformer;
+    ApodizationLut*         _apodization;
+    RegValid*               _regValid;
+    PulseLut*               _pulse;
+    AfeLut*                 _afe;
+
+public:
+    explicit BeamFormer(SonoDevice* device, quint32 offset);
+    ~BeamFormer();
+
+    void probeElementPosition (QList<QList<quint32>>& elementPosition) const;
+    void rxBeamformerProperties (RxBeamformerProperties* rxBeamformer) const;
+    void apodizationLut (QList<QList<quint32>>& apodization) const;
+    void pulseProperties (PulseProperties* pulse) const;
+    void afeLut (AfeProperties* afe) const;
+    void regValid (bool valid) const;
+};
+
+#endif // BEAMFORMER_H

include/model/hardware/core/register/beamFormer/registerDefinition/AfeLut.h

@@ -0,0 +1,143 @@
+#ifndef AFELUT_H
+#define AFELUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define LPF_PROG_PRP_MASK           0x0000000F
+#define PGA_HPF_DIS_PRP_MASK        0x00000010
+#define PGA_CLAMP_DIS_PRP_MASK      0x00000020
+#define PGA_GAIN_PRP_MASK           0x00000040
+#define GBL_ACTIVE_TERM_PRP_MASK    0x00000180
+#define ACT_TERM_EN_PRP_MASK        0x00000200
+#define INPUT_CLAMP_LVL_PRP_MASK    0x00000C00
+#define LNA_HPF_DIS_PRP_MASK        0x00001000
+#define LNA_GAIN_GBL_PRP_MASK       0x00006000
+#define LOW_NF_PRP_MASK             0x00008000
+#define POW_MODES_PRP_MASK          0x00030000
+#define GBL_PDWN_PRP_MASK           0x00040000
+#define LNA_HPF_PROG_PRP_MASK       0x00180000
+
+#define BAR      0U
+#define OFFSET   0x480800
+#define LENGTH   8U
+
+struct AfeProperties
+{
+    QList<quint32>  lpfProg;
+    QList<bool>     pgaHpfDis;
+    QList<bool>     pgaClampDis;
+    QList<bool>     pgaGain;
+    QList<quint32>  gblActiveTerm;
+    QList<bool>     actTermEn;
+    QList<quint32>  inputClampLvl;
+    QList<bool>     lnaHpfDis;
+    QList<quint32>  lnaGainGbl;
+    QList<bool>     lowNf;
+    QList<quint32>  powModes;
+    QList<bool>     gblPdwn;
+    QList<quint32>  lnaHpfProg;
+};
+
+class AfeLut : public RegisterChain
+{
+private:
+    AfeProperties* _AfeLut;
+
+    void prepareData(quint32 index) override
+    {
+        quint32 value=0;
+
+        lpfProgPrp->setValue(_AfeLut->lpfProg.at(static_cast<qint32>(index)));
+
+        value = _AfeLut->pgaHpfDis.at(static_cast<qint32>(index)) ? 1 : 0;
+        pgaHpfDisPrp->setValue(value);
+
+        value = _AfeLut->pgaClampDis.at(static_cast<qint32>(index)) ? 1 : 0;
+        pgaClampDisPrp->setValue(value);
+
+        value = _AfeLut->pgaGain.at(static_cast<qint32>(index)) ? 1 : 0;
+        pgaGainPrp->setValue(value);
+
+        gblActiveTermPrp->setValue(_AfeLut->gblActiveTerm.at(static_cast<qint32>(index)));
+
+        value = _AfeLut->actTermEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        actTermEnPrp->setValue(value);
+
+        inputClampLvlPrp->setValue(_AfeLut->inputClampLvl.at(static_cast<qint32>(index)));
+
+        value = _AfeLut->lnaHpfDis.at(static_cast<qint32>(index)) ? 1 : 0;
+        lnaHpfDisPrp->setValue(value);
+
+        lnaGainGblPrp->setValue(_AfeLut->lnaGainGbl.at(static_cast<qint32>(index)));
+
+        value = _AfeLut->lowNf.at(static_cast<qint32>(index)) ? 1 : 0;
+        lowNfPrp->setValue(value);
+
+        powModesPrp->setValue(_AfeLut->powModes.at(static_cast<qint32>(index)));
+
+        value = _AfeLut->gblPdwn.at(static_cast<qint32>(index)) ? 1 : 0;
+        gblPdwnPrp->setValue(value);
+
+        lnaHpfProgPrp->setValue(_AfeLut->lnaHpfProg.at(static_cast<qint32>(index)));
+        }
+
+public:
+    Field* lpfProgPrp;
+    Field* pgaHpfDisPrp;
+    Field* pgaClampDisPrp;
+    Field* pgaGainPrp;
+    Field* gblActiveTermPrp;
+    Field* actTermEnPrp;
+    Field* inputClampLvlPrp;
+    Field* lnaHpfDisPrp;
+    Field* lnaGainGblPrp;
+    Field* lowNfPrp;
+    Field* powModesPrp;
+    Field* gblPdwnPrp;
+    Field* lnaHpfProgPrp;
+
+    void setAfeLut (AfeProperties* AfeLut)
+    {
+        _AfeLut = AfeLut;
+    }
+
+    AfeLut(SonoDevice* device, quint32 offset) : RegisterChain(BAR, OFFSET+offset, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(lpfProgPrp, LPF_PROG_PRP_MASK);
+        ADD_UNSIGNED_FIELD(pgaHpfDisPrp, PGA_HPF_DIS_PRP_MASK);
+        ADD_BIT_FIELD(pgaClampDisPrp, PGA_CLAMP_DIS_PRP_MASK);
+        ADD_BIT_FIELD(pgaGainPrp, PGA_GAIN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(gblActiveTermPrp, GBL_ACTIVE_TERM_PRP_MASK);
+        ADD_UNSIGNED_FIELD(actTermEnPrp, ACT_TERM_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(inputClampLvlPrp, INPUT_CLAMP_LVL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lnaHpfDisPrp, LNA_HPF_DIS_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lnaGainGblPrp, LNA_GAIN_GBL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lowNfPrp, LOW_NF_PRP_MASK);
+        ADD_UNSIGNED_FIELD(powModesPrp, POW_MODES_PRP_MASK);
+        ADD_UNSIGNED_FIELD(gblPdwnPrp, GBL_PDWN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lnaHpfProgPrp, LNA_HPF_PROG_PRP_MASK);
+    }
+};
+
+#undef LPF_PROG_PRP_MASK
+#undef PGA_HPF_DIS_PRP_MASK
+#undef PGA_CLAMP_DIS_PRP_MASK
+#undef PGA_GAIN_PRP_MASK
+#undef GBL_ACTIVE_TERM_PRP_MASK
+#undef ACT_TERM_EN_PRP_MASK
+#undef INPUT_CLAMP_LVL_PRP_MASK
+#undef LNA_HPF_DIS_PRP_MASK
+#undef LNA_GAIN_GBL_PRP_MASK
+#undef LOW_NF_PRP_MASK
+#undef POW_MODES_PRP_MASK
+#undef GBL_PDWN_PRP_MASK
+#undef LNA_HPF_PROG_PRP_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // AFELUT_H

include/model/hardware/core/register/beamFormer/registerDefinition/ApodizationLut.h

@@ -0,0 +1,46 @@
+#ifndef APODIZATIONLUT_H
+#define APODIZATIONLUT_H
+
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegisterChain.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define APODIZATION_PRP_MASK   0x0003FFFF
+
+#define BAR     0
+#define OFFSET  0x4C0000
+#define LENGTH  3057U
+
+class ApodizationLut : public RegisterChain
+{
+private:
+    QList<quint32> _apodization;
+
+    void prepareData(quint32 index) override
+    {
+        apodizationPrp->setValue(_apodization.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* apodizationPrp;
+
+    void setApodizationLut (QList<quint32>& apodization)
+    {
+        _apodization = apodization;
+    }
+
+    ApodizationLut(SonoDevice* device, quint32 offset) : RegisterChain(BAR, OFFSET+offset, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(apodizationPrp, APODIZATION_PRP_MASK);
+    }
+};
+
+#undef APODIZATION_PRP_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // APODIZATIONLUT_H

include/model/hardware/core/register/beamFormer/registerDefinition/ElementPositionLut.h

@@ -0,0 +1,46 @@
+#ifndef ELEMENTPOSITIONLUT_H
+#define ELEMENTPOSITIONLUT_H
+
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegisterChain.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define ELEMENT_POSITION_PRP_MASK   0x0003FFFF
+
+#define BAR         0
+#define OFFSET      0X484000
+#define LENGTH      64U
+
+class ElementPositionLut : public RegisterChain
+{
+private:
+    QList<quint32> _elementPosition;
+
+    void prepareData(quint32 index) override
+    {
+        elementPositionPrp->setValue(_elementPosition.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* elementPositionPrp;
+
+    void setElementPositionLut (QList<quint32>& elementPosition)
+    {
+        _elementPosition = elementPosition;
+    }
+
+    ElementPositionLut(SonoDevice* device, quint32 offset) : RegisterChain(BAR, OFFSET+offset, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(elementPositionPrp, ELEMENT_POSITION_PRP_MASK);
+    }
+};
+
+#undef ELEMENT_POSITION_PRP_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // ELEMENTPOSITIONLUT_H

include/model/hardware/core/register/beamFormer/registerDefinition/PulseLut.h

@@ -0,0 +1,83 @@
+#ifndef PULSELUT_H
+#define PULSELUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HALF_PERIOD_PRP_MASK          0x0000007F
+#define HALF_CYCLE_NO_PRP_MASK        0x00000F80
+#define START_PHASE_PRP_MASK          0x00001000
+#define PULSE_VOLT_SEL_PRP_MASK       0x00002000
+#define DAMPING_PULSE_WIDTH_PRP_MASK  0x00FFC000
+
+#define BAR      0U
+#define OFFSET   0x480000
+#define LENGTH   8U
+
+struct PulseProperties
+{
+    QList<quint32>  halfPeriod;
+    QList<quint32>  halfCycleNo;
+    QList<bool>     startPhase;
+    QList<bool>     pulseVoltSel;
+    QList<quint32>  dampingPulseWidth;
+};
+
+class PulseLut : public RegisterChain
+{
+private:
+    PulseProperties* _pulseLut;
+
+    void prepareData(quint32 index) override
+    {
+        quint32 value=0;
+
+        halfPeriodPrp->setValue(_pulseLut->halfPeriod.at(static_cast<qint32>(index)));
+
+        halfCycleNoPrp->setValue(_pulseLut->halfCycleNo.at(static_cast<qint32>(index)));
+
+        value = _pulseLut->startPhase.at(static_cast<qint32>(index)) ? 1 : 0;
+        startPhasePrp->setValue(value);
+
+        value = _pulseLut->pulseVoltSel.at(static_cast<qint32>(index)) ? 1 : 0;
+        pulseVoltSelPrp->setValue(value);
+
+        dampingPulseWidthPrp->setValue(_pulseLut->dampingPulseWidth.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* halfPeriodPrp;
+    Field* halfCycleNoPrp;
+    Field* startPhasePrp;
+    Field* pulseVoltSelPrp;
+    Field* dampingPulseWidthPrp;
+
+    void setPulseLut (PulseProperties* pulseLut)
+    {
+        _pulseLut = pulseLut;
+    }
+
+    PulseLut(SonoDevice* device, quint32 offset) : RegisterChain(BAR, OFFSET+offset, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(halfPeriodPrp, HALF_PERIOD_PRP_MASK);
+        ADD_UNSIGNED_FIELD(halfCycleNoPrp, HALF_CYCLE_NO_PRP_MASK);
+        ADD_BIT_FIELD(startPhasePrp, START_PHASE_PRP_MASK);
+        ADD_BIT_FIELD(pulseVoltSelPrp, PULSE_VOLT_SEL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(dampingPulseWidthPrp, DAMPING_PULSE_WIDTH_PRP_MASK);
+    }
+};
+
+#undef HALF_PERIOD_MASK
+#undef HALF_CYCLE_NO_MASK
+#undef START_PHASE_MASK
+#undef PULSE_VOLT_SEL_MASK
+#undef DAMPING_PULSE_WIDTH_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // PULSELUT_H

include/model/hardware/core/register/beamFormer/registerDefinition/RegValid.h

@@ -0,0 +1,30 @@
+#ifndef REGVALID_H
+#define REGVALID_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define REG_VALID_MASK          0x00000001
+
+#define BAR      0U
+#define OFFSET   0x4D0000
+
+class RegValid : public Register
+{
+public:
+    Field* regValid;
+
+    RegValid(SonoDevice* device, quint32 offset) : Register(BAR, OFFSET+offset, device)
+    {
+        ADD_UNSIGNED_FIELD(regValid, REG_VALID_MASK);
+    }
+};
+
+#undef REG_VALID_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // REGVALID_H

include/model/hardware/core/register/beamFormer/registerDefinition/RxBeamformerLut.h

@@ -0,0 +1,65 @@
+#ifndef RXBEAMFORMERLUT_H
+#define RXBEAMFORMERLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define LAG_PRP_MASK                  0x000007FF
+#define APODIZATION_SEL_PRP_MASK      0x00001800
+#define MLA_PRP_MASK                  0x0000E000
+
+#define BAR      0U
+#define OFFSET   0x480400
+#define LENGTH   8U
+
+struct RxBeamformerProperties
+{
+    QList<quint32>  lag;
+    QList<quint32>  apodization;
+    QList<quint32>  mla;
+};
+
+class RxBeamformerLut : public RegisterChain
+{
+private:
+    RxBeamformerProperties* _rxBfLut;
+
+    void prepareData(quint32 index) override
+    {
+        lagPrp->setValue(_rxBfLut->lag.at(static_cast<qint32>(index)));
+
+        apodizationSelPrp->setValue(_rxBfLut->apodization.at(static_cast<qint32>(index)));
+
+        mlaPrp->setValue(_rxBfLut->mla.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* lagPrp;
+    Field* apodizationSelPrp;
+    Field* mlaPrp;
+
+    void setRxBfLut (RxBeamformerProperties* rxBfLut)
+    {
+        _rxBfLut = rxBfLut;
+    }
+
+    RxBeamformerLut(SonoDevice* device, quint32 offset) : RegisterChain(BAR, OFFSET+offset, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(lagPrp, LAG_PRP_MASK);
+        ADD_UNSIGNED_FIELD(apodizationSelPrp, APODIZATION_SEL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(mlaPrp, MLA_PRP_MASK);
+    }
+};
+
+#undef  LAG_PRP_MASK
+#undef  APODIZATION_SEL_PRP_MASK
+#undef  MLA_PRP_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // RXBEAMFORMERLUT_H

include/model/hardware/core/register/boardsCtrlMngt/BoardsCtrlMngt.h

@@ -0,0 +1,284 @@
+#ifndef BOARDSCTRLMNGT_H
+#define BOARDSCTRLMNGT_H
+
+#include <QObject>
+#include <QTimer>
+#include "registerDefinition/BoardsSpecs.h"
+
+#define TRX_ROM_MAX_LEN             131072U
+#define MPS_ROM_MAX_LEN             512U
+#define PRB_ROM_MAX_LEN             4096U
+#define PRB_CTRL_ROM_MAX_LEN        131072U
+
+#define TEMP_SENSOR_RESOLUTION      0.125f
+
+#define SUPERVISOR_RB_RESOLUTION    65535
+#define SUPERVISOR_RB_V_REF         2.048f
+#define F_SYS_CLK                   100000  // Dimension: KHz    or    200MHz
+#define CWD_Offset                  1.53f
+#define CWD_GAIN                    47.065f
+#define HVA_Offset                  1.525f
+#define HVA_GAIN                    2.635f
+#define HVB_Offset                  1.525f
+#define HVB_GAIN                    2.635f
+
+#define HVA_MAX_VALUE               66U
+
+
+enum ePg : bool
+{
+    bad = false,
+    good = true
+};
+
+struct VoltagesPg
+{
+    ePg mon12Vin;
+    ePg mon5Vin;
+    ePg mon3P3V;
+    ePg monAfeA1P8V;
+    ePg monAfeD1P8V;
+    ePg prbCtrl3P3V;
+    ePg regulatorA;
+    ePg regulatorB;
+};
+
+struct AdcVoltages
+{
+    float mon12Vin;
+    float mon5Vin;
+    float mon3P3V;
+    float monAfeA1P8V;
+    float monAfeD1P8V;
+    float afeVcntlp;
+    float prbZeroEncoder;
+    float prbCtrl3P3V;
+};
+
+struct SupervisorRbValue
+{
+    float hvap;
+    float hvbp;
+    float cwdp;
+    float curr24V;
+    float p24V;
+    float p12V;
+    float p5V;
+    float m5V;
+    float p4D;
+    float hvStop;
+};
+
+struct MpsFaultStatus
+{
+    bool hvError;
+    bool m5v;
+    bool sup4d;
+    bool p5v;
+    bool p12v;
+    bool hvap;
+    bool cwdp;
+    bool hvbp;
+    bool curr24V;
+    bool p24v;
+
+    bool overHvError;
+    bool overM5v;
+    bool overSup4d;
+    bool overP5v;
+    bool overP12v;
+    bool overHvap;
+    bool overCwdp;
+    bool overHvbp;
+    bool overCurr24V;
+    bool overP24v;
+
+    bool underHvError;
+    bool underM5v;
+    bool underSup4d;
+    bool underP5v;
+    bool underP12v;
+    bool underHvap;
+    bool underCwdp;
+    bool underHvbp;
+    bool underCurr24V;
+    bool underP24v;
+
+};
+
+class BoardsCtrlMngt : private BoardsSpecs, public QObject
+{
+private:
+
+    struct EepromReq
+    {
+        qint8   dataIn;
+        quint32 address;
+        quint8  probeSelect;
+    }*_rom;
+
+    struct AttenuationFactor
+    {
+        float hva;
+        float hvb;
+        float p24v;
+        float m5v;
+        float cwd;
+        float hvStop;
+        float p12v;
+        float p5v;
+        float p4d;
+        float curP24v;
+        AttenuationFactor();
+    }_af;
+
+    struct Gain
+    {
+        float hva;
+        float hvb;
+        float p24v;
+        float m5v;
+        float cwd;
+        float hvStop;
+        float p12v;
+        float p5v;
+        float p4d;
+        float curP24v;
+        Gain();
+    }_gn;
+
+    struct MpsDacs
+    {
+        float hvaValue;
+        float hvbValue;
+        float cwdValue;
+    }*_mpsDacs;
+
+    QTimer* _timer;
+
+    VoltagesPg* _pg;
+
+    template<class T1, class T2>
+    void eepromWrite (QByteArray& arr, quint32 addr, quint8 prbSel, T1* request, T2* status);
+
+    template<class T3>
+    void setEepromWrite (EepromReq* _rom, T3* request);
+
+    template<class T4, class T5>
+    QByteArray eepromRead (quint32 addr, quint32 length, quint8 prbSel, T4* request, T5* status);
+
+    template<class T6>
+    void setEepromRead (EepromReq* _rom, T6* request);
+
+
+    float resDiv (float r1, float r2, quint32 adcValue);
+    QVector<float> voltPg (float adcVolt);
+
+    float getCWdpValue(void) const;
+    float getCurr24vValue(void) const;
+    float getHVapValue(void) const;
+    float getHVbpValue(void) const;
+    float getHvStopValue(void) const;
+    float getM5vValue(void) const;
+    float getP12vValue(void) const;
+    float getP24vValue(void) const;
+    float getP4dValue(void) const;
+    float getP5vValue(void) const;
+
+    bool getHvErrFault(void) const;
+    bool getM5vFault(void) const;
+    bool getSup4dFault(void) const;
+    bool getP5vFault(void) const;
+    bool getP12vFault(void) const;
+    bool getHvapFault(void) const;
+    bool getCwdpFault(void) const;
+    bool getHvbpFault(void) const;
+    bool getCur24vFault(void) const;
+    bool getP24vFault(void) const;
+
+    bool getOverHvErrFault(void) const;
+    bool getOverM5vFault(void) const;
+    bool getOverSup4dFault(void) const;
+    bool getOverP5vFault(void) const;
+    bool getOverP12vFault(void) const;
+    bool getOverHvapFault(void) const;
+    bool getOverCwdpFault(void) const;
+    bool getOverHvbpFault(void) const;
+    bool getOverCur24vFault(void) const;
+    bool getOverP24vFault(void) const;
+
+    bool getUnderHvErrFault(void) const;
+    bool getUnderM5vFault(void) const;
+    bool getUnderSup4dFault(void) const;
+    bool getUnderP5vFault(void) const;
+    bool getUnderP12vFault(void) const;
+    bool getUnderHvapFault(void) const;
+    bool getUnderCwdpFault(void) const;
+    bool getUnderHvbpFault(void) const;
+    bool getUnderCur24vFault(void) const;
+    bool getUnderP24vFault(void) const;
+
+    void setReadbackCmd(bool stopWr, bool avgValue, bool roundRobinConfig) const;
+    bool getI2cCmdErr(void) const;
+    bool getI2cCmdDone(void) const;
+    bool getI2cBusy(void) const;
+    void getSupervisorI2cTimeout (void) const;
+    void getSupervisorI2cDone (void) const;
+    void setSetupCmdP24vOnOff(bool p24vOnOff) const;
+    void setSetupCmdJmp(bool jmpDacCmd) const;
+    void setSetupCmdDacsOnOff(bool cwd, bool hvb, bool hva) const;
+    void setMpsDacsValue (MpsDacs* _mpsDacs) const;
+
+    friend void trxEepromWrite(QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+    friend void mpsEepromWrite(QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+    friend void prbCtrlEepromWrite (QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+    friend void prbEepromWrite (QByteArray& array, quint32 address, quint8 prbSel, BoardsCtrlMngt* boards);
+
+    void timerShot (quint16 ms) const;
+    void timerStop (void) const;
+
+private slots:
+    bool checkTimerShot (void) const;
+
+public:
+    explicit BoardsCtrlMngt(SonoDevice* device) : BoardsSpecs(device)
+    {
+        _timer = new QTimer(this);
+    }
+    ~BoardsCtrlMngt()
+    {
+        delete _timer;
+    }
+
+    quint32 getPid (void) const;
+    quint32 getVid (void) const;
+
+    QVector<bool> getConnectedPrb (void) const;
+    void setProbeSelect (quint8 prbSel) const;
+    void prbCtrlInit (void) const;
+
+    float getTrxTempSensor (void) const;
+    float getTrxFpgaTemp (void) const;
+    AdcVoltages* getTrxBoardVoltages (void);
+    VoltagesPg* getTrxVoltagesPg (void);
+
+    void getSupervisorValue (SupervisorRbValue* sValue) const;
+    void getMpsFault (MpsFaultStatus* faultStatus) const;
+    void mpsInit (void) const;
+    void setMpsReset(void) const;     /*** checking ***/
+    void mpsHvSet(float &hva, float &hvb) const;
+
+
+    QByteArray trxEepromRead (quint32 address, quint32 length);
+    QByteArray mpsEepromRead (quint32 address, quint32 length);
+    QByteArray prbCtrlEepromRead (quint32 address, quint32 length);
+    QByteArray prbEepromRead (quint32 address, quint32 length, quint8 prbSel);
+
+};
+
+void trxEepromWrite (QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+void mpsEepromWrite (QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+void prbCtrlEepromWrite (QByteArray& array, quint32 address, BoardsCtrlMngt* boards);
+void prbEepromWrite (QByteArray& array, quint32 address, quint8 prbSel, BoardsCtrlMngt* boards);
+
+#endif // BOARDSCTRLMNGT_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/BoardsSpecs.h

@@ -0,0 +1,208 @@
+#ifndef BOARDSSPECS_H
+#define BOARDSSPECS_H
+
+//////////////// MPS Headers ////////////////
+#include "mps/SupervisorFaultStatus.h"
+#include "mps/SupervisorI2cStatus.h"
+#include "mps/SupervisorRbCurr24V.h"
+#include "mps/MpsPm5RegulatorClk.h"
+#include "mps/SupervisorDacValue.h"
+#include "mps/SupervisorRbHvStop.h"
+#include "mps/SupervisorSetupCmd.h"
+#include "mps/MpsEepromRwStatus.h"
+#include "mps/MpsHvRegulatorClk.h"
+#include "mps/SupervisorRbCwdp.h"
+#include "mps/SupervisorRbHvap.h"
+#include "mps/SupervisorRbHvbp.h"
+#include "mps/SupervisorRbP12V.h"
+#include "mps/SupervisorRbP24V.h"
+#include "mps/SupervisorRdData.h"
+#include "mps/SupervisorRbCmd.h"
+#include "mps/SupervisorRbM5V.h"
+#include "mps/SupervisorRbP4d.h"
+#include "mps/SupervisorRbP5V.h"
+#include "mps/SupervisorRwReq.h"
+#include "mps/MpsEepromRwReq.h"
+#include "mps/MpsHvStopState.h"
+#include "mps/FanStatus.h"
+
+//////////////// Prb Headers ////////////////
+#include "probe/PrbCtrlEepromRwStatus.h"
+#include "probe/PrbCtrlEepromRwReq.h"
+#include "probe/PrbEepromRwStatus.h"
+#include "probe/PrbEepromRwReq.h"
+#include "probe/PrbCtrlStatus.h"
+#include "probe/PrbCtrlCmd.h"
+
+//////////////// TRX Headers ////////////////
+#include "trx/AdcPrbZeroEncoder.h"
+#include "trx/OnBoardTempSensor.h"
+#include "trx/TrxEepromRwStatus.h"
+#include "trx/TrxEepromRwReq.h"
+#include "trx/TrxRegulatorPg.h"
+#include "trx/AdcPrbCtrl3P3V.h"
+#include "trx/AdcAfeVcntlp.h"
+#include "trx/AdcAfeA1P8V.h"
+#include "trx/AdcAfeD1P8V.h"
+#include "trx/Adc12Vin.h"
+#include "trx/Adc3P3V.h"
+#include "trx/Adc5Vin.h"
+#include "trx/PcieId.h"
+
+
+class BoardsSpecs
+{
+protected:
+    //////////////// MPS classes ////////////////
+    SupervisorFaultStatus*  _sFaultStatus;
+    SupervisorI2cStatus*    _sI2cStatus;
+    SupervisorRbCurr24V*    _sRbCurr24V;
+    MpsPm5RegulatorClk*     _mPm5Rgltor;
+    SupervisorDacValue*     _sDacValue;
+    SupervisorRbHvStop*     _sRbHvStop;
+    SupervisorSetupCmd*     _sSetupCmd;
+    MpsEepromRwStatus*      _mRomStatus;
+    MpsHvRegulatorClk*      _mHvRgltor;
+    SupervisorRbCwdp*       _sRbCwdp;
+    SupervisorRbHvap*       _sRbHvap;
+    SupervisorRbHvbp*       _sRbHvbp;
+    SupervisorRbP12V*       _sRbP12V;
+    SupervisorRbP24V*       _sRbP24V;
+    SupervisorRdData*       _sRbData;
+    SupervisorRbCmd*        _sRbCmd;
+    SupervisorRbM5V*        _sRbM5V;
+    SupervisorRbP4d*        _sRbP4D;
+    SupervisorRbP5V*        _sRbP5V;
+    SupervisorRwReq*        _sRwReq;
+    MpsEepromRwReq*         _mRomReq;
+    MpsHvStopState*         _mHvStop;
+    FanStatus*              _fan;
+
+    //////////////// Prb classes ////////////////
+    PrbCtrlEepromRwStatus*  _pCtrlRomStatus;
+    PrbCtrlEepromRwReq*     _pCtrlRomReq;
+    PrbEepromRwStatus*      _pRomStatus;
+    PrbEepromRwReq*         _pRomReq;
+    PrbCtrlStatus*          _pStatus;
+    PrbCtrlCmd*             _pCmd;
+
+    //////////////// TRX classes ////////////////
+    AdcPrbZeroEncoder*      _adcPrbEncoder;
+    OnBoardTempSensor*      _tempSensor;
+    TrxEepromRwStatus*      _tRomStatus;
+    TrxEepromRwReq*         _tRomReq;
+    TrxRegulatorPg*         _tRgltorPg;
+    AdcPrbCtrl3P3V*         _adcPrb3P3V;
+    AdcAfeVcntlp*           _adcVcntlp;
+    AdcAfeA1P8V*            _adcA1P8V;
+    AdcAfeD1P8V*            _adcD1P8V;
+    Adc12Vin*               _adc12Vin;
+    Adc3P3V*                _adc3P3V;
+    Adc5Vin*                _adc5Vin;
+    PcieId*                 _pcie;
+
+    explicit BoardsSpecs(SonoDevice* device)
+    {
+        ///////////////////// MPS Mem Alloc /////////////////////
+        _sFaultStatus   = new   SupervisorFaultStatus   (device);
+        _sI2cStatus     = new   SupervisorI2cStatus     (device);
+        _sRbCurr24V     = new   SupervisorRbCurr24V     (device);
+        _mPm5Rgltor     = new   MpsPm5RegulatorClk      (device);
+        _sDacValue      = new   SupervisorDacValue      (device);
+        _sRbHvStop      = new   SupervisorRbHvStop      (device);
+        _sSetupCmd      = new   SupervisorSetupCmd      (device);
+        _mRomStatus     = new   MpsEepromRwStatus       (device);
+        _mHvRgltor      = new   MpsHvRegulatorClk       (device);
+        _sRbCwdp        = new   SupervisorRbCwdp        (device);
+        _sRbHvap        = new   SupervisorRbHvap        (device);
+        _sRbHvbp        = new   SupervisorRbHvbp        (device);
+        _sRbP12V        = new   SupervisorRbP12V        (device);
+        _sRbP24V        = new   SupervisorRbP24V        (device);
+        _sRbData        = new   SupervisorRdData        (device);
+        _sRbCmd         = new   SupervisorRbCmd         (device);
+        _sRbM5V         = new   SupervisorRbM5V         (device);
+        _sRbP4D         = new   SupervisorRbP4d         (device);
+        _sRbP5V         = new   SupervisorRbP5V         (device);
+        _sRwReq         = new   SupervisorRwReq         (device);
+        _mRomReq        = new   MpsEepromRwReq          (device);
+        _mHvStop        = new   MpsHvStopState          (device);
+        _fan            = new   FanStatus               (device);
+
+        ///////////////////// Prb Mem Alloc /////////////////////
+        _pCtrlRomStatus = new   PrbCtrlEepromRwStatus   (device);
+        _pCtrlRomReq    = new   PrbCtrlEepromRwReq      (device);
+        _pRomStatus     = new   PrbEepromRwStatus       (device);
+        _pRomReq        = new   PrbEepromRwReq          (device);
+        _pStatus        = new   PrbCtrlStatus           (device);
+        _pCmd           = new   PrbCtrlCmd              (device);
+
+        ///////////////////// TRX Mem Alloc /////////////////////
+        _adcPrbEncoder  = new   AdcPrbZeroEncoder       (device);
+        _tempSensor     = new   OnBoardTempSensor       (device);
+        _tRomStatus     = new   TrxEepromRwStatus       (device);
+        _tRomReq        = new   TrxEepromRwReq          (device);
+        _tRgltorPg      = new   TrxRegulatorPg          (device);
+        _adcPrb3P3V     = new   AdcPrbCtrl3P3V          (device);
+        _adcVcntlp      = new   AdcAfeVcntlp            (device);
+        _adcA1P8V       = new   AdcAfeA1P8V             (device);
+        _adcD1P8V       = new   AdcAfeD1P8V             (device);
+        _adc12Vin       = new   Adc12Vin                (device);
+        _adc3P3V        = new   Adc3P3V                 (device);
+        _adc5Vin        = new   Adc5Vin                 (device);
+        _pcie           = new   PcieId                  (device);
+
+    }
+    ~BoardsSpecs()
+    {
+        //// MPS Mem delete ////
+        delete  _sFaultStatus;
+        delete  _sI2cStatus;
+        delete  _sRbCurr24V;
+        delete  _mPm5Rgltor;
+        delete  _sDacValue;
+        delete  _sRbHvStop;
+        delete  _sSetupCmd;
+        delete  _mRomStatus;
+        delete  _mHvRgltor;
+        delete  _sRbCwdp;
+        delete  _sRbHvap;
+        delete  _sRbHvbp;
+        delete  _sRbP12V;
+        delete  _sRbP24V;
+        delete  _sRbData;
+        delete  _sRbCmd;
+        delete  _sRbM5V;
+        delete  _sRbP4D;
+        delete  _sRbP5V;
+        delete  _sRwReq;
+        delete  _mRomReq;
+        delete  _mHvStop;
+        delete  _fan;
+
+        //// Prb Mem delete ////
+        delete  _pCtrlRomStatus;
+        delete  _pCtrlRomReq;
+        delete  _pRomStatus;
+        delete  _pRomReq;
+        delete  _pStatus;
+        delete  _pCmd;
+
+        //// TRX Mem delete ////
+        delete  _adcPrbEncoder;
+        delete  _tempSensor;
+        delete  _tRomStatus;
+        delete  _tRomReq;
+        delete  _tRgltorPg;
+        delete  _adcPrb3P3V;
+        delete  _adcVcntlp;
+        delete  _adcA1P8V;
+        delete  _adcD1P8V;
+        delete  _adc12Vin;
+        delete  _adc3P3V;
+        delete  _adc5Vin;
+        delete  _pcie;
+
+    }
+};
+
+#endif // BOARDSSPECS

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/FanStatus.h

@@ -0,0 +1,34 @@
+#ifndef FANSTATUS_H
+#define FANSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define FAN1_FAULT_MASK     0x00000001
+#define FAN2_FAULT_MASK     0x00000002
+
+#define BAR 0
+#define OFFSET 0X260C0
+
+class FanStatus : public Register
+{
+public:
+	Field* fan1Fault;
+    Field* fan2Fault;
+
+    FanStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(fan1Fault, FAN1_FAULT_MASK);
+        ADD_UNSIGNED_FIELD(fan2Fault, FAN2_FAULT_MASK);
+	}
+};
+
+#undef FAN1_FAULT_MASK
+#undef FAN2_FAULT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/MpsEepromRwReq.h

@@ -0,0 +1,46 @@
+#ifndef MPSEEPROMRWREQ_H
+#define MPSEEPROMRWREQ_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define MPS_EEPROM_DATA_IN_MASK     0x000000FF
+#define MPS_EEPROM_ADDRESS_MASK     0x01FFFF00
+#define PRB_EEPROM_PROBE_SEL_MASK   0x06000000  // actually reserved
+#define MPS_EEPROM_RD_REQ_MASK      0x40000000
+#define MPS_EEPROM_WR_REQ_MASK      0x80000000
+
+#define BAR 0
+#define OFFSET 0X26004
+
+class MpsEepromRwReq : public Register
+{
+public:
+        Field* dataIn;
+        Field* address;
+        Field* prbSel;
+        Field* rdReq;
+        Field* wrReq;
+
+        MpsEepromRwReq(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(dataIn, MPS_EEPROM_DATA_IN_MASK);
+            ADD_UNSIGNED_FIELD(address, MPS_EEPROM_ADDRESS_MASK);
+            ADD_UNSIGNED_FIELD(prbSel, PRB_EEPROM_PROBE_SEL_MASK);
+            ADD_UNSIGNED_FIELD(rdReq, MPS_EEPROM_RD_REQ_MASK);
+            ADD_UNSIGNED_FIELD(wrReq, MPS_EEPROM_WR_REQ_MASK);
+        }
+};
+
+#undef MPS_EEPROM_DATA_IN_MASK
+#undef MPS_EEPROM_ADDRESS_MASK
+#undef PRB_EEPROM_PROBE_SEL_MASK
+#undef MPS_EEPROM_RD_REQ_MASK
+#undef MPS_EEPROM_WR_REQ_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // MPSEEPROMRWREQ_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/MpsEepromRwStatus.h

@@ -0,0 +1,42 @@
+#ifndef MPSEEPROMRWSTATUS_H
+#define MPSEEPROMRWSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define MPS_EEPROM_REQ_DONE_MASK    0x00000001
+#define MPS_EEPROM_REQ_ERROR_MASK   0x00000002
+#define MPS_EEPROM_BUSY_MASK        0x00000004
+#define MPS_EEPROM_DATA_OUT_MASK    0x0000FF00
+
+#define BAR 0
+#define OFFSET 0X26040
+
+class MpsEepromRwStatus : public Register
+{
+public:
+        Field* reqDone;
+        Field* reqError;
+        Field* busy;
+        Field* dataOut;
+
+        MpsEepromRwStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(reqDone, MPS_EEPROM_REQ_DONE_MASK);
+            ADD_UNSIGNED_FIELD(reqError, MPS_EEPROM_REQ_ERROR_MASK);
+            ADD_UNSIGNED_FIELD(busy, MPS_EEPROM_BUSY_MASK);
+            ADD_UNSIGNED_FIELD(dataOut, MPS_EEPROM_DATA_OUT_MASK);
+        }
+};
+
+#undef MPS_EEPROM_REQ_DONE_MASK
+#undef MPS_EEPROM_REQ_ERROR_MASK
+#undef MPS_EEPROM_BUSY_MASK
+#undef MPS_EEPROM_DATA_OUT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // MPSEEPROMRWSTATUS_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/MpsHvRegulatorClk.h

@@ -0,0 +1,38 @@
+#ifndef MPSHVREGULATORCLK_H
+#define MPSHVREGULATORCLK_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define SYNC_HVS_HALF_PERIOD_MASK       0x00003FFF
+#define SYNC_HVS_VALID_MASK             0x00004000
+#define SYNC_HVS_ENABLE_MASK            0x00008000
+
+#define BAR 0
+#define OFFSET 0X26020
+
+class MpsHvRegulatorClk : public Register
+{
+public:
+	Field* syncHVsHalfPeriod;
+	Field* syncHVsValid;
+	Field* syncHVsEnable;
+
+    MpsHvRegulatorClk(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(syncHVsHalfPeriod, SYNC_HVS_HALF_PERIOD_MASK);
+        ADD_UNSIGNED_FIELD(syncHVsValid, SYNC_HVS_VALID_MASK);
+        ADD_UNSIGNED_FIELD(syncHVsEnable, SYNC_HVS_ENABLE_MASK);
+	}
+};
+
+#undef SYNC_HVS_HALF_PERIOD_MASK
+#undef SYNC_HVS_VALID_MASK
+#undef SYNC_HVS_ENABLE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/MpsHvStopState.h

@@ -0,0 +1,42 @@
+#ifndef MPSHVSTOPSTATE_H
+#define MPSHVSTOPSTATE_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define THSD_HV_STOP_MASK       0x00000001
+#define PG_HV_STOP_MASK         0x00000002
+#define TEMP_HV_STOP_MASK       0x00000004
+#define PROBE_HV_STOP_MASK      0x00000008
+
+#define BAR 0
+#define OFFSET 0X260C4
+
+class MpsHvStopState : public Register
+{
+public:
+	Field* thsdHvStop;
+    Field* pgHvStop;
+    Field* tempHvStop;
+    Field* probeHvStop;
+
+    MpsHvStopState(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(thsdHvStop, THSD_HV_STOP_MASK);
+        ADD_UNSIGNED_FIELD(pgHvStop, PG_HV_STOP_MASK);
+        ADD_UNSIGNED_FIELD(tempHvStop, TEMP_HV_STOP_MASK);
+        ADD_UNSIGNED_FIELD(probeHvStop, PROBE_HV_STOP_MASK);
+	}
+};
+
+#undef THSD_HV_STOP_MASK
+#undef PG_HV_STOP_MASK
+#undef TEMP_HV_STOP_MASK
+#undef PROBE_HV_STOP_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/MpsPm5RegulatorClk.h

@@ -0,0 +1,38 @@
+#ifndef MPSPM5REGULATORCLK_H
+#define MPSPM5REGULATORCLK_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define SYNC_PM5_HALF_PERIOD_MASK       0x00003FFF
+#define SYNC_PM5_VALID_MASK             0x00004000
+#define SYNC_PM5_ENABLE_MASK            0x00008000
+
+#define BAR 0
+#define OFFSET 0X26024
+
+class MpsPm5RegulatorClk : public Register
+{
+public:
+	Field* syncPM5HalfPeriod;
+	Field* syncPM5Valid;
+	Field* syncPM5Enable;
+
+    MpsPm5RegulatorClk(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(syncPM5HalfPeriod, SYNC_PM5_HALF_PERIOD_MASK);
+        ADD_UNSIGNED_FIELD(syncPM5Valid, SYNC_PM5_VALID_MASK);
+        ADD_UNSIGNED_FIELD(syncPM5Enable, SYNC_PM5_ENABLE_MASK);
+	}
+};
+
+#undef SYNC_PM5_HALF_PERIOD_MASK
+#undef SYNC_PM5_VALID_MASK
+#undef SYNC_PM5_ENABLE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorDacValue.h

@@ -0,0 +1,42 @@
+#ifndef SUPERVISORDACVALUE_H
+#define SUPERVISORDACVALUE_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HVA_VALUE_MASK          0x000000FF
+#define HVB_VALUE_MASK          0x0000FF00
+#define CWD_VALUE_MASK          0x00FF0000
+#define DACS_VALUE_VALID_MASK   0x01000000
+
+#define BAR 0
+#define OFFSET 0X2602C
+
+class SupervisorDacValue : public Register
+{
+public:
+	Field* hvaValue;
+    Field* hvbValue;
+    Field* cwdValue;
+	Field* dacsValueValid;
+
+    SupervisorDacValue(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(hvaValue, HVA_VALUE_MASK);
+        ADD_UNSIGNED_FIELD(hvbValue, HVB_VALUE_MASK);
+        ADD_UNSIGNED_FIELD(cwdValue, CWD_VALUE_MASK);
+        ADD_UNSIGNED_FIELD(dacsValueValid, DACS_VALUE_VALID_MASK);
+	}
+};
+
+#undef HVA_VALUE_MASK
+#undef HVB_VALUE_MASK
+#undef CWD_VALUE_MASK
+#undef DACS_VALUE_VALID_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorFaultStatus.h

@@ -0,0 +1,154 @@
+#ifndef SUPERVISORFAULTSTATUS_H
+#define SUPERVISORFAULTSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HV_ERROR_MASK                   0x00000001
+#define M5V_MASK                        0x00000002
+#define SUP_4D_MASK                     0x00000004
+#define P5V_MASK                        0x00000008
+#define P12V_MASK                       0x00000010
+#define HVA_MASK                        0x00000020
+#define CWD_MASK                        0x00000040
+#define HVB_MASK                        0x00000080
+#define CUR_24V_OR_HV_MUX_MASK          0x00000100
+#define P24V_MASK                       0x00000200
+
+#define OVER_HV_ERROR_MASK              0x00000400
+#define OVER_M5V_MASK                   0x00000800
+#define OVER_SUP_4D_MASK                0x00001000
+#define OVER_P5V_MASK                   0x00002000
+#define OVER_P12V_MASK                  0x00004000
+#define OVER_HVA_MASK                   0x00008000
+#define OVER_CWD_MASK                   0x00010000
+#define OVER_HVB_MASK                   0x00020000
+#define OVER_CUR_24V_OR_HV_MUX_MASK     0x00040000
+#define OVER_P24V_MASK                  0x00080000
+
+#define UNDER_HV_ERROR_MASK             0x00100000
+#define UNDER_M5V_MASK                  0x00200000
+#define UNDER_SUP_4D_MASK               0x00400000
+#define UNDER_P5V_MASK                  0x00800000
+#define UNDER_P12V_MASK                 0x01000000
+#define UNDER_HVA_MASK                  0x02000000
+#define UNDER_CWD_MASK                  0x04000000
+#define UNDER_HVB_MASK                  0x08000000
+#define UNDER_CUR_24V_OR_HV_MUX_MASK    0x10000000
+#define UNDER_P24V_MASK                 0x20000000
+
+#define BAR 0
+#define OFFSET 0X26094
+
+class SupervisorFaultStatus : public Register
+{
+public:
+	Field* hvError;
+	Field* m5v;
+	Field* sup4d;
+	Field* p5v;
+	Field* p12v;
+	Field* hva;
+	Field* cwd;
+	Field* hvb;
+	Field* cur24vOrHvMux;
+	Field* p24v;
+
+	Field* overHvError;
+	Field* overM5v;
+	Field* overSup4d;
+	Field* overP5v;
+	Field* overP12v;
+	Field* overHva;
+	Field* overCwd;
+	Field* overHvb;
+	Field* overCur24vOrHvMux;
+	Field* overP24v;
+    
+    Field* underHvError;
+	Field* underM5v;
+	Field* underSup4d;
+	Field* underP5v;
+	Field* underP12v;
+	Field* underHva;
+	Field* underCwd;
+	Field* underHvb;
+	Field* underCur24vOrHvMux;
+	Field* underP24v;
+
+    SupervisorFaultStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(hvError, HV_ERROR_MASK);
+        ADD_UNSIGNED_FIELD(m5v, M5V_MASK);
+        ADD_UNSIGNED_FIELD(sup4d, SUP_4D_MASK);
+        ADD_UNSIGNED_FIELD(p5v, P5V_MASK);
+        ADD_UNSIGNED_FIELD(p12v, P12V_MASK);
+        ADD_UNSIGNED_FIELD(hva, HVA_MASK);
+        ADD_UNSIGNED_FIELD(cwd, CWD_MASK);
+        ADD_UNSIGNED_FIELD(hvb, HVB_MASK);
+        ADD_UNSIGNED_FIELD(cur24vOrHvMux, CUR_24V_OR_HV_MUX_MASK);
+        ADD_UNSIGNED_FIELD(p24v, P24V_MASK);
+        
+        ADD_UNSIGNED_FIELD(overHvError, OVER_HV_ERROR_MASK);
+        ADD_UNSIGNED_FIELD(overM5v, OVER_M5V_MASK);
+        ADD_UNSIGNED_FIELD(overSup4d, OVER_SUP_4D_MASK);
+        ADD_UNSIGNED_FIELD(overP5v, OVER_P5V_MASK);
+        ADD_UNSIGNED_FIELD(overP12v, OVER_P12V_MASK);
+        ADD_UNSIGNED_FIELD(overHva, OVER_HVA_MASK);
+        ADD_UNSIGNED_FIELD(overCwd, OVER_CWD_MASK);
+        ADD_UNSIGNED_FIELD(overHvb, OVER_HVB_MASK);
+        ADD_UNSIGNED_FIELD(overCur24vOrHvMux, OVER_CUR_24V_OR_HV_MUX_MASK);
+        ADD_UNSIGNED_FIELD(overP24v, OVER_P24V_MASK);
+        
+        ADD_UNSIGNED_FIELD(underHvError, UNDER_HV_ERROR_MASK);
+        ADD_UNSIGNED_FIELD(underM5v, UNDER_M5V_MASK);
+        ADD_UNSIGNED_FIELD(underSup4d, UNDER_SUP_4D_MASK);
+        ADD_UNSIGNED_FIELD(underP5v, UNDER_P5V_MASK);
+        ADD_UNSIGNED_FIELD(underP12v, UNDER_P12V_MASK);
+        ADD_UNSIGNED_FIELD(underHva, UNDER_HVA_MASK);
+        ADD_UNSIGNED_FIELD(underCwd, UNDER_CWD_MASK);
+        ADD_UNSIGNED_FIELD(underHvb, UNDER_HVB_MASK);
+        ADD_UNSIGNED_FIELD(underCur24vOrHvMux, UNDER_CUR_24V_OR_HV_MUX_MASK);
+        ADD_UNSIGNED_FIELD(underP24v, UNDER_P24V_MASK);
+	}
+};
+
+#undef HV_ERROR_MASK
+#undef M5V_MASK
+#undef SUP_4D_MASK
+#undef P5V_MASK
+#undef P12V_MASK
+#undef HVA_MASK
+#undef CWD_MASK
+#undef HVB_MASK
+#undef CUR_24V_OR_HV_MUX_MASK
+#undef P24V_MASK
+
+#undef OVER_HV_ERROR_MASK
+#undef OVER_M5V_MASK
+#undef OVER_SUP_4D_MASK
+#undef OVER_P5V_MASK
+#undef OVER_P12V_MASK
+#undef OVER_HVA_MASK
+#undef OVER_CWD_MASK
+#undef OVER_HVB_MASK
+#undef OVER_CUR_24V_OR_HV_MUX_MASK
+#undef OVER_P24V_MASK
+
+#undef UNDER_HV_ERROR_MASK
+#undef UNDER_M5V_MASK
+#undef UNDER_SUP_4D_MASK
+#undef UNDER_P5V_MASK
+#undef UNDER_P12V_MASK
+#undef UNDER_HVA_MASK
+#undef UNDER_CWD_MASK
+#undef UNDER_HVB_MASK
+#undef UNDER_CUR_24V_OR_HV_MUX_MASK
+#undef UNDER_P24V_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorI2cStatus.h

@@ -0,0 +1,38 @@
+#ifndef SUPERVISORI2CSTATUS_H
+#define SUPERVISORI2CSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CMD_ERROR_MASK      0x00000001
+#define CMD_DONE_MASK       0x00000002
+#define BUSY_MASK           0x00000004
+
+#define BAR 0
+#define OFFSET 0X26
+
+class SupervisorI2cStatus : public Register
+{
+public:
+	Field* cmdError;
+    Field* cmdDone;
+    Field* busy;
+
+    SupervisorI2cStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(cmdError, CMD_ERROR_MASK);
+        ADD_UNSIGNED_FIELD(cmdDone, CMD_DONE_MASK);
+        ADD_UNSIGNED_FIELD(busy, BUSY_MASK);
+	}
+};
+
+#undef CMD_ERROR_MASK
+#undef CMD_DONE_MASK
+#undef BUSY_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbCmd.h

@@ -0,0 +1,38 @@
+#ifndef SUPERVISORRBCMD_H
+#define SUPERVISORRBCMD_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define ROUND_ROBIN_CONFIG_MASK     0x00000001
+#define AVERAGE_VALUE_RD_REQ_MASK   0x00000002
+#define RESET_STOP_WR_MASK          0x00000004
+
+#define BAR 0
+#define OFFSET 0X26034
+
+class SupervisorRbCmd : public Register
+{
+public:
+	Field* roundRobinConfig;
+	Field* averageValueRdReq;
+    Field* resetStopWr;
+
+    SupervisorRbCmd(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(roundRobinConfig, ROUND_ROBIN_CONFIG_MASK);
+        ADD_UNSIGNED_FIELD(averageValueRdReq, AVERAGE_VALUE_RD_REQ_MASK);
+        ADD_UNSIGNED_FIELD(resetStopWr, RESET_STOP_WR_MASK);
+	}
+};
+
+#undef ROUND_ROBIN_CONFIG_MASK
+#undef AVERAGE_VALUE_RD_REQ_MASK
+#undef RESET_STOP_WR_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbCurr24V.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBCURR24V_H
+#define SUPERVISORRBCURR24V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CURRENT_P24V_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260A4
+
+class SupervisorRbCurr24V : public Register
+{
+public:
+	Field* currentP24vAvgValue;
+
+    SupervisorRbCurr24V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(currentP24vAvgValue, CURRENT_P24V_AVG_VALUE_MASK);
+	}
+};
+
+#undef CURRENT_P24V_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSETs
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbCwdp.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBCWDP_H
+#define SUPERVISORRBCWDP_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CWDP_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X2609C
+
+class SupervisorRbCwdp : public Register
+{
+public:
+	Field* cwdpAvgValue;
+
+    SupervisorRbCwdp(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(cwdpAvgValue, CWDP_AVG_VALUE_MASK);
+	}
+};
+
+#undef CWDP_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbHvStop.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBHVSTOP_H
+#define SUPERVISORRBHVSTOP_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HV_STOP_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260AC
+
+class SupervisorRbHvStop : public Register
+{
+public:
+	Field* hvStopAvgValue;
+
+    SupervisorRbHvStop(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(hvStopAvgValue, HV_STOP_AVG_VALUE_MASK);
+	}
+};
+
+#undef HV_STOP_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbHvap.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBHVAP_H
+#define SUPERVISORRBHVAP_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HVAP_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X26098
+
+class SupervisorRbHvap : public Register
+{
+public:
+	Field* hvapAvgValue;
+
+    SupervisorRbHvap(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(hvapAvgValue, HVAP_AVG_VALUE_MASK);
+	}
+};
+
+#undef HVAP_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbHvbp.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBHVBP_H
+#define SUPERVISORRBHVBP_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define HVBP_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260A0
+
+class SupervisorRbHvbp : public Register
+{
+public:
+	Field* hvbpAvgValue;
+
+    SupervisorRbHvbp(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(hvbpAvgValue, HVBP_AVG_VALUE_MASK);
+	}
+};
+
+#undef HVBP_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbM5V.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBM5V_H
+#define SUPERVISORRBM5V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define M5V_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260B0
+
+class SupervisorRbM5V : public Register
+{
+public:
+	Field* m5vAvgValue;
+
+    SupervisorRbM5V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(m5vAvgValue, M5V_AVG_VALUE_MASK);
+	}
+};
+
+#undef M5V_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbP12V.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBP12V_H
+#define SUPERVISORRBP12V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define P12V_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260BC
+
+class SupervisorRbP12V : public Register
+{
+public:
+	Field* p12vAvgValue;
+
+    SupervisorRbP12V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(p12vAvgValue, P12V_AVG_VALUE_MASK);
+	}
+};
+
+#undef P12V_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbP24V.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBP24V_H
+#define SUPERVISORRBP24V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define P24V_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260A8
+
+class SupervisorRbP24V : public Register
+{
+public:
+	Field* p24vAvgValue;
+
+    SupervisorRbP24V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(p24vAvgValue, P24V_AVG_VALUE_MASK);
+	}
+};
+
+#undef P24V_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbP4d.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBP4D_H
+#define SUPERVISORRBP4D_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define P4D_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260B4
+
+class SupervisorRbP4d : public Register
+{
+public:
+	Field* p4dAvgValue;
+
+    SupervisorRbP4d(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(p4dAvgValue, P4D_AVG_VALUE_MASK);
+	}
+};
+
+#undef P4D_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRbP5V.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRBP5V_H
+#define SUPERVISORRBP5V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define P5V_AVG_VALUE_MASK     0x0000FFFF
+
+#define BAR 0
+#define OFFSET 0X260B8
+
+class SupervisorRbP5V : public Register
+{
+public:
+	Field* p5vAvgValue;
+
+    SupervisorRbP5V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(p5vAvgValue, P5V_AVG_VALUE_MASK);
+	}
+};
+
+#undef P5V_AVG_VALUE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRdData.h

@@ -0,0 +1,30 @@
+#ifndef SUPERVISORRDDATA_H
+#define SUPERVISORRDDATA_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define DATA_OUT_MASK    0x000000FF
+
+#define BAR 0
+#define OFFSET 0X26090
+
+class SupervisorRdData : public Register
+{
+public:
+	Field* dataOut;
+
+    SupervisorRdData(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(dataOut, DATA_OUT_MASK);
+	}
+};
+
+#undef DATA_OUT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorRwReq.h

@@ -0,0 +1,43 @@
+#ifndef SUPERVISORRWREQ_H
+#define SUPERVISORRWREQ_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define DATA_IN_MASK    0x000000FF
+#define ADDRESS_MASK    0x0000FF00
+#define RD_REQ_MASK     0x00010000
+#define WR_REQ_MASK     0x00020000
+
+
+#define BAR 0
+#define OFFSET 0X26028
+
+class SupervisorRwReq : public Register
+{
+public:
+	Field* dataIn;
+	Field* address;
+	Field* rdReq;
+    Field* wrReq;
+
+    SupervisorRwReq(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(dataIn, DATA_IN_MASK);
+        ADD_UNSIGNED_FIELD(address, ADDRESS_MASK);
+        ADD_UNSIGNED_FIELD(rdReq, RD_REQ_MASK);
+        ADD_UNSIGNED_FIELD(wrReq, WR_REQ_MASK);
+	}
+};
+
+#undef DATA_IN_MASK
+#undef ADDRESS_MASK
+#undef RD_REQ_MASK
+#undef WR_REQ_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/mps/SupervisorSetupCmd.h

@@ -0,0 +1,47 @@
+#ifndef SUPERVISORSETUPCMD_H
+#define SUPERVISORSETUPCMD_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define P24V_ON_OFF_MASK    0x00000001
+#define JMP_CMD_MASK        0x00000002
+#define CWD_ON_OFF_MASK     0x00000004
+#define HVB_ON_OFF_MASK     0x00000008
+#define HVA_ON_OFF_MASK     0x00000010
+
+#define BAR 0
+#define OFFSET 0X26030
+
+class SupervisorSetupCmd : public Register
+{
+public:
+	Field* p24vOnOff;
+	Field* jmpCmd;
+	Field* cwdOnOff;
+    Field* hvbOnOff;
+    Field* hvaOnOff;
+
+
+    SupervisorSetupCmd(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(p24vOnOff, P24V_ON_OFF_MASK);
+        ADD_UNSIGNED_FIELD(jmpCmd, JMP_CMD_MASK);
+        ADD_UNSIGNED_FIELD(cwdOnOff, CWD_ON_OFF_MASK);
+        ADD_UNSIGNED_FIELD(hvbOnOff, HVB_ON_OFF_MASK);
+        ADD_UNSIGNED_FIELD(hvaOnOff, HVA_ON_OFF_MASK);
+	}
+};
+
+#undef P24V_ON_OFF_MASK
+#undef JMP_CMD_MASK
+#undef CWD_ON_OFF_MASK
+#undef HVB_ON_OFF_MASK
+#undef HVA_ON_OFF_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbCtrlCmd.h

@@ -0,0 +1,54 @@
+#ifndef PRBCTRLCMD_H
+#define PRBCTRLCMD_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PROBE_CONNECTOR_SELECT_MASK     0x00000007
+#define PROBE_A_LOW_PWR_EN_MASK         0x00000010
+#define PROBE_B_LOW_PWR_EN_MASK         0x00000020
+#define PROBE_C_LOW_PWR_EN_MASK         0x00000040
+#define PROBE_D_LOW_PWR_EN_MASK         0x00000080
+#define HV_MUX_PWR_EN_MASK              0x00000100
+#define MOTOR_MUX_PWR_EN_MASK           0x00000200
+
+#define BAR 0
+#define OFFSET 0X26018
+
+class PrbCtrlCmd : public Register
+{
+public:
+	Field* probeConnectorSelect;
+	Field* probeALowPwrEn;
+	Field* probeBLowPwrEn;
+	Field* probeCLowPwrEn;
+	Field* probeDLowPwrEn;
+	Field* HvMuxPwrEn;
+	Field* MotorMuxPwrEn;
+
+    PrbCtrlCmd(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(probeConnectorSelect, PROBE_CONNECTOR_SELECT_MASK);
+        ADD_UNSIGNED_FIELD(probeALowPwrEn, PROBE_A_LOW_PWR_EN_MASK);
+        ADD_UNSIGNED_FIELD(probeBLowPwrEn, PROBE_B_LOW_PWR_EN_MASK);
+        ADD_UNSIGNED_FIELD(probeCLowPwrEn, PROBE_C_LOW_PWR_EN_MASK);
+        ADD_UNSIGNED_FIELD(probeDLowPwrEn, PROBE_D_LOW_PWR_EN_MASK);
+        ADD_UNSIGNED_FIELD(HvMuxPwrEn, HV_MUX_PWR_EN_MASK);
+        ADD_UNSIGNED_FIELD(MotorMuxPwrEn, MOTOR_MUX_PWR_EN_MASK);
+	}
+};
+
+#undef PROBE_CONNECTOR_SELECT_MASK
+#undef PROBE_A_LOW_PWR_EN_MASK
+#undef PROBE_B_LOW_PWR_EN_MASK
+#undef PROBE_C_LOW_PWR_EN_MASK
+#undef PROBE_D_LOW_PWR_EN_MASK
+#undef HV_MUX_PWR_EN_MASK
+#undef MOTOR_MUX_PWR_EN_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbCtrlEepromRwReq.h

@@ -0,0 +1,46 @@
+#ifndef PRBCTRLEEPROMRWREQ_H
+#define PRBCTRLEEPROMRWREQ_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define RB_EEPROM_DATA_IN_MASK      0x000000FF
+#define RB_EEPROM_ADDRESS_MASK      0x01FFFF00
+#define PRB_EEPROM_PROBE_SEL_MASK   0x06000000  // actually reserved
+#define RB_EEPROM_RD_REQ_MASK       0x40000000
+#define RB_EEPROM_WR_REQ_MASK       0x80000000
+
+#define BAR 0
+#define OFFSET 0X26008
+
+class PrbCtrlEepromRwReq : public Register
+{
+public:
+        Field* dataIn;
+        Field* address;
+        Field* prbSel;
+        Field* rdReq;
+        Field* wrReq;
+
+        PrbCtrlEepromRwReq(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(dataIn, RB_EEPROM_DATA_IN_MASK);
+            ADD_UNSIGNED_FIELD(address, RB_EEPROM_ADDRESS_MASK);
+            ADD_UNSIGNED_FIELD(prbSel, PRB_EEPROM_PROBE_SEL_MASK);
+            ADD_UNSIGNED_FIELD(rdReq, RB_EEPROM_RD_REQ_MASK);
+            ADD_UNSIGNED_FIELD(wrReq, RB_EEPROM_WR_REQ_MASK);
+        }
+};
+
+#undef RB_EEPROM_DATA_IN_MASK
+#undef RB_EEPROM_ADDRESS_MASK
+#undef PRB_EEPROM_PROBE_SEL_MASK
+#undef RB_EEPROM_RD_REQ_MASK
+#undef RB_EEPROM_WR_REQ_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // RELAYBOARDEEPROMRWREQ_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbCtrlEepromRwStatus.h

@@ -0,0 +1,42 @@
+#ifndef PRBCTRLEEPROMRWSTATUS_H
+#define PRBCTRLEEPROMRWSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define RB_EEPROM_REQ_DONE_MASK    0x00000001
+#define RB_EEPROM_REQ_ERROR_MASK   0x00000002
+#define RB_EEPROM_BUSY_MASK        0x00000004
+#define RB_EEPROM_DATA_OUT_MASK    0x0000FF00
+
+#define BAR 0
+#define OFFSET 0X26048
+
+class PrbCtrlEepromRwStatus : public Register
+{
+public:
+        Field* reqDone;
+        Field* reqError;
+        Field* busy;
+        Field* dataOut;
+
+        PrbCtrlEepromRwStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(reqDone, RB_EEPROM_REQ_DONE_MASK);
+            ADD_UNSIGNED_FIELD(reqError,RB_EEPROM_REQ_ERROR_MASK);
+            ADD_UNSIGNED_FIELD(busy,    RB_EEPROM_BUSY_MASK);
+            ADD_UNSIGNED_FIELD(dataOut, RB_EEPROM_DATA_OUT_MASK);
+        }
+};
+
+#undef RB_EEPROM_REQ_DONE_MASK
+#undef RB_EEPROM_REQ_ERROR_MASK
+#undef RB_EEPROM_BUSY_MASK
+#undef RB_EEPROM_DATA_OUT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // RELAYBOARDEEPROMSTATUS_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbCtrlStatus.h

@@ -0,0 +1,46 @@
+#ifndef PRBCTRLSTATUS_H
+#define PRBCTRLSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PROBE_A_DETECTION_MASK      0x00000001
+#define PROBE_B_DETECTION_MASK      0x00000002
+#define PROBE_C_DETECTION_MASK      0x00000004
+#define PROBE_D_DETECTION_MASK      0x00000008
+#define PROBE_DIP_SWITCH_ID_MASK    0x000000F0
+
+#define BAR 0
+#define OFFSET 0X26088
+
+class PrbCtrlStatus : public Register
+{
+public:
+    Field* probeADetection;
+    Field* probeBDetection;
+    Field* probeCDetection;
+    Field* probeDDetection;
+    Field* probeDipSwitchId;
+
+    PrbCtrlStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(probeADetection, PROBE_A_DETECTION_MASK);
+        ADD_UNSIGNED_FIELD(probeBDetection, PROBE_B_DETECTION_MASK);
+        ADD_UNSIGNED_FIELD(probeCDetection, PROBE_C_DETECTION_MASK);
+        ADD_UNSIGNED_FIELD(probeDDetection, PROBE_D_DETECTION_MASK);
+        ADD_UNSIGNED_FIELD(probeDipSwitchId, PROBE_DIP_SWITCH_ID_MASK);
+	}
+};
+
+#undef PROBE_A_DETECTION_MASK
+#undef PROBE_B_DETECTION_MASK
+#undef PROBE_C_DETECTION_MASK
+#undef PROBE_D_DETECTION_MASK
+#undef PROBE_DIP_SWITCH_ID_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbEepromRwReq.h

@@ -0,0 +1,46 @@
+#ifndef PRBEEPROMRWREQ_H
+#define PRBEEPROMRWREQ_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PRB_EEPROM_DATA_IN_MASK    0x000000FF
+#define PRB_EEPROM_ADDRESS_MASK    0x01FFFF00
+#define PRB_EEPROM_PROBE_SEL_MASK  0x06000000
+#define PRB_EEPROM_RD_REQ_MASK     0x40000000
+#define PRB_EEPROM_WR_REQ_MASK     0x80000000
+
+#define BAR 0
+#define OFFSET 0X2600C
+
+class PrbEepromRwReq : public Register
+{
+public:
+        Field* dataIn;
+        Field* address;
+        Field* prbSel;
+        Field* rdReq;
+        Field* wrReq;
+
+        PrbEepromRwReq(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(dataIn, PRB_EEPROM_DATA_IN_MASK);
+            ADD_UNSIGNED_FIELD(address, PRB_EEPROM_ADDRESS_MASK);
+            ADD_UNSIGNED_FIELD(prbSel, PRB_EEPROM_PROBE_SEL_MASK);
+            ADD_UNSIGNED_FIELD(rdReq, PRB_EEPROM_RD_REQ_MASK);
+            ADD_UNSIGNED_FIELD(wrReq, PRB_EEPROM_WR_REQ_MASK);
+        }
+};
+
+#undef PRB_EEPROM_DATA_IN_MASK
+#undef PRB_EEPROM_ADDRESS_MASK
+#undef PRB_EEPROM_PROBE_SEL_MASK
+#undef PRB_EEPROM_RD_REQ_MASK
+#undef PRB_EEPROM_WR_REQ_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // PROBEEEPROMRWREQ_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/probe/PrbEepromRwStatus.h

@@ -0,0 +1,42 @@
+#ifndef PRBEEPROMRWSTATUS_H
+#define PRBEEPROMRWSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PRB_EEPROM_REQ_DONE_MASK    0x00000001
+#define PRB_EEPROM_REQ_ERROR_MASK   0x00000002
+#define PRB_EEPROM_BUSY_MASK        0x00000004
+#define PRB_EEPROM_DATA_OUT_MASK    0x0000FF00
+
+#define BAR 0
+#define OFFSET 0X2604C
+
+class PrbEepromRwStatus : public Register
+{
+public:
+        Field* reqDone;
+        Field* reqError;
+        Field* busy;
+        Field* dataOut;
+
+        PrbEepromRwStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(reqDone, PRB_EEPROM_REQ_DONE_MASK);
+            ADD_UNSIGNED_FIELD(reqError,PRB_EEPROM_REQ_ERROR_MASK);
+            ADD_UNSIGNED_FIELD(busy,    PRB_EEPROM_BUSY_MASK);
+            ADD_UNSIGNED_FIELD(dataOut, PRB_EEPROM_DATA_OUT_MASK);
+        }
+};
+
+#undef PRB_EEPROM_REQ_DONE_MASK
+#undef PRB_EEPROM_REQ_ERROR_MASK
+#undef PRB_EEPROM_BUSY_MASK
+#undef PRB_EEPROM_DATA_OUT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // PROBEEEPROMRWSTATUS_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/Adc12Vin.h

@@ -0,0 +1,30 @@
+#ifndef ADC12VIN_H
+#define ADC12VIN_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL0_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26068
+
+class Adc12Vin : public Register
+{
+public:
+	Field* channel0Mon;
+
+    Adc12Vin(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel0Mon, CHANNEL0_MON_MASK);
+	}
+};
+
+#undef CHANNEL0_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/Adc3P3V.h

@@ -0,0 +1,30 @@
+#ifndef ADC3P3V_H
+#define ADC3P3V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef BAR
+
+#define CHANNEL5_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26070
+
+class Adc3P3V : public Register
+{
+public:
+	Field* channel5Mon;
+
+    Adc3P3V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel5Mon, CHANNEL5_MON_MASK);
+	}
+};
+
+#undef CHANNEL5_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/Adc5Vin.h

@@ -0,0 +1,30 @@
+#ifndef ADC5VIN_H
+#define ADC5VIN_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef BAR
+
+#define CHANNEL1_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X2606C
+
+class Adc5Vin : public Register
+{
+public:
+	Field* channel1Mon;
+
+    Adc5Vin(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel1Mon, CHANNEL1_MON_MASK);
+	}
+};
+
+#undef CHANNEL1_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/AdcAfeA1P8V.h

@@ -0,0 +1,30 @@
+#ifndef ADCAFEA1P8V_H
+#define ADCAFEA1P8V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL6_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26074
+
+class AdcAfeA1P8V : public Register
+{
+public:
+	Field* channel6Mon;
+
+    AdcAfeA1P8V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel6Mon, CHANNEL6_MON_MASK);
+	}
+};
+
+#undef CHANNEL6_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/AdcAfeD1P8V.h

@@ -0,0 +1,30 @@
+#ifndef ADCAFED1P8V_H
+#define ADCAFED1P8V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL7_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26078
+
+class AdcAfeD1P8V : public Register
+{
+public:
+	Field* channel7Mon;
+
+    AdcAfeD1P8V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel7Mon, CHANNEL7_MON_MASK);
+	}
+};
+
+#undef CHANNEL7_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/AdcAfeVcntlp.h

@@ -0,0 +1,30 @@
+#ifndef ADCAFEVCNTLP_H
+#define ADCAFEVCNTLP_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL4_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X2607C
+
+class AdcAfeVcntlp : public Register
+{
+public:
+	Field* channel4Mon;
+
+    AdcAfeVcntlp(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel4Mon, CHANNEL4_MON_MASK);
+	}
+};
+
+#undef CHANNEL4_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/AdcPrbCtrl3P3V.h

@@ -0,0 +1,30 @@
+#ifndef ADCPRBCTRL3P3V_H
+#define ADCPRBCTRL3P3V_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL3_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26084
+
+class AdcPrbCtrl3P3V : public Register
+{
+public:
+	Field* channel3Mon;
+
+    AdcPrbCtrl3P3V(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel3Mon, CHANNEL3_MON_MASK);
+	}
+};
+
+#undef CHANNEL3_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/AdcPrbZeroEncoder.h

@@ -0,0 +1,30 @@
+#ifndef ADCPRBZEROENCODER_H
+#define ADCPRBZEROENCODER_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define CHANNEL2_MON_MASK          0x00000FFF
+
+#define BAR 0
+#define OFFSET 0X26080
+
+class AdcPrbZeroEncoder : public Register
+{
+public:
+	Field* channel2Mon;
+
+    AdcPrbZeroEncoder(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(channel2Mon, CHANNEL2_MON_MASK);
+	}
+};
+
+#undef CHANNEL2_MON_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/OnBoardTempSensor.h

@@ -0,0 +1,30 @@
+#ifndef ONBOARDTEMPSENSOR_H
+#define ONBOARDTEMPSENSOR_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define TEMPERATURE_MASK    0x000007FF
+
+#define BAR 0
+#define OFFSET 0X26064
+
+class OnBoardTempSensor : public Register
+{
+public:
+	Field* temperature;
+
+    OnBoardTempSensor(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(temperature, TEMPERATURE_MASK);
+	}
+};
+
+#undef TEMPERATURE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/PcieId.h

@@ -0,0 +1,34 @@
+#ifndef PCIEID_H
+#define PCIEID_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PID_MASK 0xFFFF0000
+#define VID_MASK 0x0000FFFF
+
+#define BAR 2
+#define OFFSET 0
+
+class PcieId : public Register
+{
+public:
+	Field* pid;
+	Field* vid;
+
+    PcieId(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+		ADD_UNSIGNED_FIELD(pid, PID_MASK);
+		ADD_UNSIGNED_FIELD(vid, VID_MASK);
+	}
+};
+
+#undef PID_MASK
+#undef VID_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/TrxEepromRwReq.h

@@ -0,0 +1,46 @@
+#ifndef TRXEEPROMRWREQ_H
+#define TRXEEPROMRWREQ_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define TRX_EEPROM_DATA_IN_MASK     0x000000FF
+#define TRX_EEPROM_ADDRESS_MASK     0x01FFFF00
+#define PRB_EEPROM_PROBE_SEL_MASK   0x06000000  // actually reserved
+#define TRX_EEPROM_RD_REQ_MASK      0x40000000
+#define TRX_EEPROM_WR_REQ_MASK      0x80000000
+
+#define BAR 0
+#define OFFSET 0X26000
+
+class TrxEepromRwReq : public Register
+{
+public:
+        Field* dataIn;
+        Field* address;
+        Field* prbSel;
+        Field* rdReq;
+        Field* wrReq;
+
+        TrxEepromRwReq(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(dataIn, TRX_EEPROM_DATA_IN_MASK);
+            ADD_UNSIGNED_FIELD(address, TRX_EEPROM_ADDRESS_MASK);
+            ADD_UNSIGNED_FIELD(prbSel, PRB_EEPROM_PROBE_SEL_MASK);
+            ADD_UNSIGNED_FIELD(rdReq, TRX_EEPROM_RD_REQ_MASK);
+            ADD_UNSIGNED_FIELD(wrReq, TRX_EEPROM_WR_REQ_MASK);
+        }
+};
+
+#undef TRX_EEPROM_DATA_IN_MASK
+#undef TRX_EEPROM_ADDRESS_MASK
+#undef PRB_EEPROM_PROBE_SEL_MASK
+#undef TRX_EEPROM_RD_REQ_MASK
+#undef TRX_EEPROM_WR_REQ_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // TRXEEPROMRWREQ_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/TrxEepromRwStatus.h

@@ -0,0 +1,42 @@
+#ifndef TRXEEPROMRWSTATUS_H
+#define TRXEEPROMRWSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define TRX_EEPROM_REQ_DONE_MASK    0x00000001
+#define TRX_EEPROM_REQ_ERROR_MASK   0x00000002
+#define TRX_EEPROM_BUSY_MASK        0x00000004
+#define TRX_EEPROM_DATA_OUT_MASK    0x0000FF00
+
+#define BAR 0
+#define OFFSET 0X26044
+
+class TrxEepromRwStatus : public Register
+{
+public:
+        Field* reqDone;
+        Field* reqError;
+        Field* busy;
+        Field* dataOut;
+
+        TrxEepromRwStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+        {
+            ADD_UNSIGNED_FIELD(reqDone, TRX_EEPROM_REQ_DONE_MASK);
+            ADD_UNSIGNED_FIELD(reqError,TRX_EEPROM_REQ_ERROR_MASK);
+            ADD_UNSIGNED_FIELD(busy,    TRX_EEPROM_BUSY_MASK);
+            ADD_UNSIGNED_FIELD(dataOut, TRX_EEPROM_DATA_OUT_MASK);
+        }
+};
+
+#undef TRX_EEPROM_REQ_DONE_MASK
+#undef TRX_EEPROM_REQ_ERROR_MASK
+#undef TRX_EEPROM_BUSY_MASK
+#undef TRX_EEPROM_DATA_OUT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // TRXEEPROMRWSTATUS_H

include/model/hardware/core/register/boardsCtrlMngt/registerDefinition/trx/TrxRegulatorPg.h

@@ -0,0 +1,34 @@
+#ifndef TRXREGULATORPG_H
+#define TRXREGULATORPG_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define REG_A_MASK          0x00000001
+#define REG_B_MASK          0x00000002
+
+#define BAR 0
+#define OFFSET 0X26060
+
+class TrxRegulatorPg : public Register
+{
+public:
+	Field* regA;
+	Field* regB;
+
+    TrxRegulatorPg(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+		ADD_BIT_FIELD(regA, REG_A_MASK);
+		ADD_BIT_FIELD(regB, REG_B_MASK);
+	}
+};
+
+#undef REG_A_MASK
+#undef REG_B_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/bpiFlash/BpiFlash.h

@@ -0,0 +1,21 @@
+#ifndef BPIFLASH_H
+#define BPIFLASH_H
+
+#include "registerDefinition/McsRdWr.h"
+
+class BpiFlash
+{
+private:
+    McsRdWr*    _mcsRdWr;
+
+public:
+    explicit BpiFlash(SonoDevice* device);
+    ~BpiFlash();
+
+    void writeMcs (QByteArray& mcs) const;
+    void readMcs (QList<quint32>* mcs) const;
+
+
+};
+
+#endif // BPIFLASH_H

include/model/hardware/core/register/bpiFlash/registerDefinition/McsRdWr.h

@@ -0,0 +1,50 @@
+#ifndef MCSRDWR_H
+#define MCSRDWR_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define MASTER_MCS_DATA_MASK    0xFFFFFFFF
+
+#define BAR     1U
+#define OFFSET  0X8000000
+#define MCS_FILE_SIZE           27*1024*1024    // now and must be modified
+
+class McsRdWr : public RegisterChain
+{
+private:
+    QList<quint32> _mcsListWr;
+
+    void prepareData(quint32 index) override
+    {
+        masterMcsData->setValue(_mcsListWr.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* masterMcsData;
+    QList<quint32> mcsListRd;
+
+    void mcsWrite (QList<quint32>& mcsList) {
+         _mcsListWr = mcsList;
+    }
+
+    //void receiveData (void) override
+//    {
+//        mcsListRd.append(masterMcsData->getValue());
+//    }
+
+    McsRdWr(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, MCS_FILE_SIZE)
+    {
+        ADD_UNSIGNED_FIELD(masterMcsData, MASTER_MCS_DATA_MASK);
+    }
+};
+
+#undef MASTER_MCS_DATA_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // MCSRDWR_H

include/model/hardware/core/register/builtInTest/BuiltInTest.h

@@ -0,0 +1,41 @@
+#ifndef BUILTINTEST_H
+#define BUILTINTEST_H
+
+#include "registerDefinition/BiteDacMemory.h"
+#include "registerDefinition/BiteDacMemoryCmd.h"
+#include "registerDefinition/BiteDacOutputSelect.h"
+
+class BuiltInTest
+{
+private:
+    BiteDacMemory*          _dacMemory;
+    BiteDacMemoryCmd*       _dacCmd;
+    BiteDacOutputSelect*    _dacOutput;
+
+    struct BiteOutputSelect
+    {
+        bool dacIN;
+        bool dacIP;
+        bool dacQN;
+        bool dacQP;
+    }*_dacOutputSelect;
+
+    struct BiteMemoryCmd
+    {
+      bool   command;
+      quint8 interval;
+    }*_dacMemoryCmd;
+
+    void setDacOutputSelect (BiteOutputSelect* _outputSelect) const;
+    void setDacMemoryCmd    (BiteMemoryCmd* _memoryCmd) const;
+
+public:
+    explicit BuiltInTest(SonoDevice* device);
+    ~BuiltInTest();
+
+    void biteDacMemoryWrite (TxDacMemory* txDacMem) const;
+    void biteDacEnable(quint8 biteInterval, bool cmd) const;
+
+};
+
+#endif // BUILTINTEST_H

include/model/hardware/core/register/builtInTest/registerDefinition/BiteDacMemory.h

@@ -0,0 +1,57 @@
+#ifndef BITEDACMEMORY_H
+#define BITEDACMEMORY_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define TxDAC_I_DATA_MASK   0x000000FF
+#define TxDAC_Q_DATA_MASK   0x0000FF00
+
+#define BAR     0U
+#define OFFSET  0XE000
+#define LENGTH  2048U
+
+struct TxDacMemory
+{
+    QList<quint32>  _iData;
+    QList<quint32>  _qData;
+};
+
+
+class BiteDacMemory : public RegisterChain
+{
+private:
+    TxDacMemory* _txDacMem;
+    void prepareData(quint32 index) override
+    {
+        txDacIData->setValue(_txDacMem->_iData.at(static_cast<qint32>(index)));
+        txDacQData->setValue(_txDacMem->_qData.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* txDacIData;
+    Field* txDacQData;
+
+    void setTxDacMemory(TxDacMemory* txDacMem)
+    {
+        _txDacMem = txDacMem;
+    }
+
+    BiteDacMemory(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(txDacIData, TxDAC_I_DATA_MASK);
+        ADD_UNSIGNED_FIELD(txDacQData, TxDAC_Q_DATA_MASK);
+    }
+};
+
+#undef TxDAC_I_DATA_MASK
+#undef TxDAC_Q_DATA_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // BITEDACMEMORY_H

include/model/hardware/core/register/builtInTest/registerDefinition/BiteDacMemoryCmd.h

@@ -0,0 +1,35 @@
+#ifndef BITEDACMEMORYCMD_H
+#define BITEDACMEMORYCMD_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define START_STOP_MASK         0x00000001
+#define BITE_INTERVAL_MASK      0x0000FF00
+
+#define BAR     0U
+#define OFFSET  0X10000
+
+class BiteDacMemoryCmd : public Register
+{
+public:
+	Field* startStop;
+    Field* biteInterval;
+
+    BiteDacMemoryCmd(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(biteInterval, BITE_INTERVAL_MASK);
+        ADD_UNSIGNED_FIELD(startStop, START_STOP_MASK);
+	}
+};
+
+
+#undef START_STOP_MASK
+#undef BITE_INTERVAL_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/builtInTest/registerDefinition/BiteDacOutputSelect.h

@@ -0,0 +1,42 @@
+#ifndef BITEDACOUTPUTSELECT_H
+#define BITEDACOUTPUTSELECT_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define DAC_I_N_MASK    0x00000001
+#define DAC_I_P_MASK    0x00000002
+#define DAC_Q_N_MASK    0x00000004
+#define DAC_Q_P_MASK    0x00000008
+
+#define BAR     0U
+#define OFFSET  0X10004
+
+class BiteDacOutputSelect : public Register
+{
+public:
+	Field* dacIN;
+    Field* dacIP;
+    Field* dacQN;
+    Field* dacQP;
+
+    BiteDacOutputSelect(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(dacIN, DAC_I_N_MASK);
+        ADD_UNSIGNED_FIELD(dacIP, DAC_I_P_MASK);
+        ADD_UNSIGNED_FIELD(dacQN, DAC_Q_N_MASK);
+        ADD_UNSIGNED_FIELD(dacQP, DAC_Q_P_MASK);
+	}
+};
+
+#undef DAC_I_N_MASK
+#undef DAC_I_P_MASK
+#undef DAC_Q_N_MASK
+#undef DAC_Q_P_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/clockDistributer/ClockDistributer.h

@@ -0,0 +1,50 @@
+#ifndef CLOCKDISTRIBUTER_H
+#define CLOCKDISTRIBUTER_H
+
+#include "registerDefinition/CwModeEnable.h"
+#include "registerDefinition/CwModeStatus.h"
+#include "registerDefinition/ClkDistributionId.h"
+
+
+enum eClkMode : bool
+{
+    Normal=false,
+    Cw=true,
+};
+
+class ClockDistributer
+{
+private:
+
+     const quint8 _clockDistrId;
+
+     CwModeEnable*      _cwEnable;
+     ClkDistributionId* _clkDistrId;
+
+    struct ModeEnable
+    {
+       quint32  cwClkDivision;
+       bool     cwClkEnable;
+       bool     spiClkDistStart;
+    }*_cwModeEnable;
+
+    struct ModeStatus
+    {
+        CwModeStatus*   _cwStatus;
+        bool getSpiClkDistDone(void) const;
+        bool getSpiClkDistBusy(void) const;
+        bool getEepromClkDistDone(void) const;
+    }_cwModeStatus;
+
+    void setCwModeEnable(ModeEnable*);
+    bool connectionCheck(void) const;
+
+public:
+    explicit ClockDistributer(SonoDevice* device);
+    ~ClockDistributer();
+
+    void clockMode (quint32 clkDiv, eClkMode mode);
+
+};
+
+#endif // CLOCKDISTRIBUTER_H

include/model/hardware/core/register/clockDistributer/registerDefinition/ClkDistributionId.h

@@ -0,0 +1,30 @@
+#ifndef CLKDISTRIBUTIONID_H
+#define CLKDISTRIBUTIONID_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define PART_ID_MASK    0x000000FF
+
+#define BAR     0U
+#define OFFSET  0X800C
+
+class ClkDistributionId : public Register
+{
+public:
+    Field* partId;
+
+    ClkDistributionId(SonoDevice* device) : Register (BAR, OFFSET, device)
+    {
+        ADD_UNSIGNED_FIELD(partId, PART_ID_MASK);
+    }
+};
+
+#undef PART_ID_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // CLKDISTRIBUTIONID_H

include/model/hardware/core/register/clockDistributer/registerDefinition/CwModeEnable.h

@@ -0,0 +1,38 @@
+#ifndef CWMODEENABLE_H
+#define CWMODEENABLE_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define SPI_CLK_DIST_START_MASK 0x00000001
+#define CW_CLK_EN_MASK          0x00000002
+#define CW_CLK_DIVISION_MASK    0x0000003C
+
+#define BAR     0U
+#define OFFSET  0XAC10
+
+class CwModeEnable : public Register
+{
+public:
+    Field* spiClkDistStart;
+    Field* cwClkEn;
+    Field* cwClkdivision;
+
+    CwModeEnable(SonoDevice* device) : Register(BAR, OFFSET, device)
+    {
+        ADD_UNSIGNED_FIELD(spiClkDistStart, SPI_CLK_DIST_START_MASK);
+        ADD_UNSIGNED_FIELD(cwClkEn, CW_CLK_EN_MASK);
+        ADD_UNSIGNED_FIELD(cwClkdivision, CW_CLK_DIVISION_MASK);
+    }
+};
+
+#undef SPI_CLK_DIST_START_MASK
+#undef CW_CLK_EN_MASK
+#undef CW_CLK_DIVISION_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // CWMODEENABLE_H

include/model/hardware/core/register/clockDistributer/registerDefinition/CwModeStatus.h

@@ -0,0 +1,38 @@
+#ifndef CWMODESTATUS_H
+#define CWMODESTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define SPI_CLK_DIST_DONE_MASK      0x00000001
+#define SPI_CLK_DIST_BUSY_MASK      0x00000002
+#define EEPROM_CLK_DIST_DONE_MASK   0x00000004
+
+#define BAR     0U
+#define OFFSET  0XAC1C
+
+class CwModeStatus : public Register
+{
+public:
+    Field* spiClkDistDone;
+    Field* spiClkDistBusy;
+    Field* eepromClkDistDone;
+
+    CwModeStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+    {
+        ADD_UNSIGNED_FIELD(spiClkDistDone, SPI_CLK_DIST_DONE_MASK);
+        ADD_UNSIGNED_FIELD(spiClkDistBusy, SPI_CLK_DIST_BUSY_MASK);
+        ADD_UNSIGNED_FIELD(eepromClkDistDone, EEPROM_CLK_DIST_DONE_MASK);
+    }
+};
+
+#undef SPI_CLK_DIST_DONE_MASK
+#undef SPI_CLK_DIST_BUSY_MASK
+#undef EEPROM_CLK_DIST_DONE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // CWMODESTATUS_H

include/model/hardware/core/register/dsp/Dsp.h

@@ -0,0 +1,52 @@
+#ifndef DSP_H
+#define DSP_H
+
+#include "registerDefinition/ReceiverConfigurationLut.h"
+#include "registerDefinition/LineFilterCoefficient.h"
+#include "registerDefinition/StbCoefficient.h"
+#include "registerDefinition/FrequencyLut.h"
+#include "registerDefinition/BlendWeight.h"
+#include "registerDefinition/ManualAtgc.h"
+#include "registerDefinition/DtgcLut.h"
+#include "registerDefinition/AtgcLut.h"
+#include "registerDefinition/LpfLut.h"
+
+#define BLEND_WEIGHT_OFFSET     0x800
+#define ATGC_OFFSET             0x400
+#define LPF_OFFSET              0x400
+
+enum eAtgcMode : bool
+{
+    Auto=false,
+    Manual=true,
+};
+
+class Dsp
+{
+private:
+    ReceiverConfigurationLut*   _configLut;
+    LineFilterCoefficient*      _lineFilterLut;
+    StbCoefficient*             _stbLut;
+    FrequencyLut*               _freqLut;
+    BlendWeight*                _blendWeight;
+    ManualAtgc*                 _manualAtgc;
+    DtgcLut*                    _dtgcLut;
+    AtgcLut*                    _atgcLut;
+    LpfLut*                     _lpfLut;
+
+public:
+    explicit Dsp(SonoDevice* device);
+    ~Dsp();
+
+    void receiverConfigurationLut (ReceiverConfiguration* configLut) const;
+    void lineFilterCoefficient (QList<quint32>& lineFilterLut) const;
+    void stbCoefficient (QList<quint32>& stbLut) const;
+    void frequencyLut (QList<quint32>& freqLut) const;
+    void blendWeight (QList<QList<quint32>>& blendWeight) const;
+    void atgcMode (eAtgcMode mode, quint16 value) const;
+    void dtgcLut (QList<quint32>& dtgcLut) const;
+    void atgcLut (QList<QList<quint32>>& atgcLut) const;
+    void lpfLut (QList<QList<quint32>>& lpfLut) const;
+
+};
+#endif // DSP_H

include/model/hardware/core/register/dsp/registerDefinition/AtgcLut.h

@@ -0,0 +1,45 @@
+#ifndef ATGCLUT_H
+#define ATGCLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define ATGC_LUT_MASK   0x00000FFF
+
+#define BAR     0
+#define OFFSET  0x85000
+#define LENGTH  256U
+
+class AtgcLut : public RegisterChain
+{
+private:
+    QList<quint32> _atgcLut;
+
+    void prepareData(quint32 index) override
+    {
+        atgcLut->setValue(_atgcLut.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* atgcLut;
+
+    void setAtgcLut (QList<quint32>& atgcLut) {
+         _atgcLut = atgcLut;
+    }
+
+    AtgcLut(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(atgcLut, ATGC_LUT_MASK);
+    }
+};
+
+#undef ATGC_LUT_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // ATGCLUT_H

include/model/hardware/core/register/dsp/registerDefinition/BlendWeight.h

@@ -0,0 +1,45 @@
+#ifndef BLENDWEIGHT_H
+#define BLENDWEIGHT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define BLEND_WEIGHT_MASK   0x000001FF
+
+#define BAR     0
+#define OFFSET  0x82000
+#define LENGTH  512U
+
+class BlendWeight : public RegisterChain
+{
+private:
+    QList<quint32> _blendWeight;
+
+    void prepareData(quint32 index) override
+    {
+        blendWeight->setValue(_blendWeight.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* blendWeight;
+
+    void setBlendWeight (QList<quint32>& blendWeight) {
+         _blendWeight = blendWeight;
+    }
+
+    BlendWeight(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(blendWeight, BLEND_WEIGHT_MASK);
+    }
+};
+
+#undef BLEND_WEIGHT_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // BLENDWEIGHT_H

include/model/hardware/core/register/dsp/registerDefinition/DtgcLut.h

@@ -0,0 +1,45 @@
+#ifndef DTGCLUT_H
+#define DTGCLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define DTGC_LUT_MASK   0x00000FFF
+
+#define BAR     0
+#define OFFSET  0X84000
+#define LENGTH  1024U
+
+class DtgcLut : public RegisterChain
+{
+private:
+    QList<quint32> _dtLut;
+
+    void prepareData(quint32 index) override
+    {
+        dtgcLut->setValue(_dtLut.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* dtgcLut;
+
+    void setDtgcLut (QList<quint32>& dtLut) {
+         _dtLut = dtLut;
+    }
+
+    DtgcLut(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(dtgcLut, DTGC_LUT_MASK);
+    }
+};
+
+#undef DTGC_LUT_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // DTGCLUT_H

include/model/hardware/core/register/dsp/registerDefinition/FrequencyLut.h

@@ -0,0 +1,45 @@
+#ifndef FREQUENCYLUT_H
+#define FREQUENCYLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define FREQ_LUT_MASK   0x00FFFFFF
+
+#define BAR     0
+#define OFFSET  0X80800
+#define LENGTH  8U
+
+class FrequencyLut : public RegisterChain
+{
+private:
+    QList<quint32> _fLut;
+
+    void prepareData(quint32 index) override
+    {
+        freqLut->setValue(_fLut.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* freqLut;
+
+    void setFreqLut (QList<quint32>& fLut) {
+         _fLut = fLut;
+    }
+
+    FrequencyLut(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(freqLut, FREQ_LUT_MASK);
+    }
+};
+
+#undef FREQ_LUT_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // FREQUENCYLUT_H

include/model/hardware/core/register/dsp/registerDefinition/LineFilterCoefficient.h

@@ -0,0 +1,50 @@
+#ifndef LINEFILTERCOEFFICIENT_H
+#define LINEFILTERCOEFFICIENT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define LINE_FILTER_LUT_EVEN_MASK   0x000001FF
+#define LINE_FILTER_LUT_ODD_MASK    0x01FF0000
+
+#define BAR     0
+#define OFFSET  0x86010
+#define LENGTH  2U      // 4/2
+
+class LineFilterCoefficient : public RegisterChain
+{
+private:
+    QList<quint32> _lineFilterLut;
+
+    void prepareData(quint32 index) override
+    {
+        lineFilterLutEven->setValue(_lineFilterLut.at(static_cast<qint32>(index*2)));
+        lineFilterLutOdd ->setValue(_lineFilterLut.at(static_cast<qint32>(index*2 + 1)));
+    }
+
+public:
+    Field* lineFilterLutEven;
+    Field* lineFilterLutOdd;
+
+    void setLineFilterLut (QList<quint32>& lineFilterLut) {
+         _lineFilterLut = lineFilterLut;
+    }
+
+    LineFilterCoefficient(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(lineFilterLutEven, LINE_FILTER_LUT_EVEN_MASK);
+        ADD_UNSIGNED_FIELD(lineFilterLutOdd , LINE_FILTER_LUT_ODD_MASK );
+    }
+};
+
+#undef LINE_FILTER_LUT_EVEN_MASK
+#undef LINE_FILTER_LUT_ODD_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // LINEFILTERCOEFFICIENT_H

include/model/hardware/core/register/dsp/registerDefinition/LpfLut.h

@@ -0,0 +1,45 @@
+#ifndef LPFLUT_H
+#define LPFLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define LPF_LUT_MASK    0x0000FFFF
+
+#define BAR     0
+#define OFFSET  0x81000
+#define LENGTH  48U
+
+class LpfLut : public RegisterChain
+{
+private:
+    QList<quint32> _lpfLut;
+
+    void prepareData(quint32 index) override
+    {
+        lpfLut->setValue(_lpfLut.at(static_cast<qint32>(index)));
+    }
+
+public:
+    Field* lpfLut;
+
+    void setLpfLut (QList<quint32>& lpfLut) {
+         _lpfLut = lpfLut;
+    }
+
+    LpfLut(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(lpfLut, LPF_LUT_MASK);
+    }
+};
+
+#undef LPF_LUT_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // LPFLUT_H

include/model/hardware/core/register/dsp/registerDefinition/ManualAtgc.h

@@ -0,0 +1,38 @@
+#ifndef MANUALATGC_H
+#define MANUALATGC_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define USER_DAC_VALUE_MASK     0x00000FFF
+#define USER_VALID_MASK         0x00001000
+#define USER_MODE_ENABLE_MASK   0x00002000
+
+#define BAR     0U
+#define OFFSET  0X86018
+
+class ManualAtgc : public Register
+{
+public:
+    Field* userDacValue;
+    Field* userValid;
+    Field* userModeEnable;
+
+    ManualAtgc(SonoDevice* device) : Register (BAR, OFFSET, device)
+    {
+        ADD_UNSIGNED_FIELD(userDacValue, USER_DAC_VALUE_MASK);
+        ADD_UNSIGNED_FIELD(userValid, USER_VALID_MASK);
+        ADD_UNSIGNED_FIELD(userModeEnable, USER_MODE_ENABLE_MASK);
+    }
+};
+
+#undef USER_DAC_VALUE_MASK
+#undef USER_VALID_MASK
+#undef USER_MODE_ENABLE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // MANUALATGC_H

include/model/hardware/core/register/dsp/registerDefinition/ReceiverConfigurationLut.h

@@ -0,0 +1,159 @@
+#ifndef RECEIVERCONFIGURATIONLUT_H
+#define RECEIVERCONFIGURATIONLUT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define MLA_PRP_MASK                   0x00000007
+#define LINE_MODE_PRP_MASK             0x00000078
+#define ATGC_SEL_PRP_MASK              0x00000180
+#define STB_EN_PRP_MASK                0x00000200
+#define STB_PRP_MASK                   0x00000C00
+#define SUBTRACT_FILTER_EN_PRP_MASK    0x00001000
+#define DC_CANCEL_EN_PRP_MASK          0x00002000
+#define NCO_FREQ_SEL_PRP_MASK          0x0001C000
+#define LPF_SEL_PRP_MASK               0x00060000
+#define ABS_EN_PRP_MASK                0x00080000
+#define FOCUS_NO_PRP_MASK              0x00300000
+#define LINE_FILTER_EN_PRP_MASK        0x00400000
+#define DDC_EN_PRP_MASK                0x00800000
+#define WMF_EN_PRP_MASK                0x01000000
+#define DPE_EN_PRP_MASK                0x02000000
+
+#define BAR      0U
+#define OFFSET   0X80000
+#define LENGTH   8U
+
+struct ReceiverConfiguration
+{
+    QList<quint32>  mla;
+    QList<quint32>  lineMode;
+    QList<quint32>  aTgcSel;
+    QList<bool>     stbEn;
+    QList<quint32>  stb;
+    QList<bool>     subtractFilterEn;
+    QList<bool>     dcCancelerEn;
+    QList<quint32>  ncoFreqSel;
+    QList<quint32>  lpfSel;
+    QList<bool>     absEn;
+    QList<quint32>  focusNo;
+    QList<bool>     lineFilterEn;
+    QList<bool>     ddcEn;
+    QList<bool>     wmfEn;
+    QList<bool>     dpeEn;
+};
+
+class ReceiverConfigurationLut : public RegisterChain
+{
+private:
+    ReceiverConfiguration* _configLut;
+
+    void prepareData(quint32 index) override
+    {
+        quint32 value=0;
+
+        mlaPrp->setValue(_configLut->mla.at(static_cast<qint32>(index)));
+
+        lineModePrp->setValue(_configLut->lineMode.at(static_cast<qint32>(index)));
+
+        atgcSelPrp->setValue(_configLut->aTgcSel.at(static_cast<qint32>(index)));
+
+        value = _configLut->stbEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        stbEnPrp->setValue(value);
+
+        stbPrp->setValue(_configLut->stb.at(static_cast<qint32>(index)));
+
+        value = _configLut->subtractFilterEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        subtractFilterEnPrp->setValue(value);
+
+        value = _configLut->dcCancelerEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        dcCancelEnPrp->setValue(value);
+
+        ncoFreqSelPrp->setValue(_configLut->ncoFreqSel.at(static_cast<qint32>(index)));
+
+        lpfSelPrp->setValue(_configLut->lpfSel.at(static_cast<qint32>(index)));
+
+        value = _configLut->absEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        absEnPrp->setValue(value);
+
+        focusNoPrp->setValue(_configLut->focusNo.at(static_cast<qint32>(index)));
+
+        value = _configLut->lineFilterEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        lineFilterEnPrp->setValue(value);
+
+        value = _configLut->ddcEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        ddcEnPrp->setValue(value);
+
+        value = _configLut->wmfEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        wmfEnPrp->setValue(value);
+
+        value = _configLut->dpeEn.at(static_cast<qint32>(index)) ? 1 : 0;
+        dpeEnPrp->setValue(value);
+    }
+
+public:
+    Field* mlaPrp;
+    Field* lineModePrp;
+    Field* atgcSelPrp;
+    Field* stbEnPrp;
+    Field* stbPrp;
+    Field* subtractFilterEnPrp;
+    Field* dcCancelEnPrp;
+    Field* ncoFreqSelPrp;
+    Field* lpfSelPrp;
+    Field* absEnPrp;
+    Field* focusNoPrp;
+    Field* lineFilterEnPrp;
+    Field* ddcEnPrp;
+    Field* wmfEnPrp;
+    Field* dpeEnPrp;
+
+    void setReceiverConfigurationLut (ReceiverConfiguration* configLut)
+    {
+        _configLut = configLut;
+    }
+
+    ReceiverConfigurationLut(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+	{
+        ADD_UNSIGNED_FIELD(mlaPrp, MLA_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lineModePrp, LINE_MODE_PRP_MASK);
+        ADD_UNSIGNED_FIELD(atgcSelPrp, ATGC_SEL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(stbEnPrp, STB_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(stbPrp, STB_PRP_MASK);
+        ADD_UNSIGNED_FIELD(subtractFilterEnPrp, SUBTRACT_FILTER_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(dcCancelEnPrp, DC_CANCEL_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(ncoFreqSelPrp, NCO_FREQ_SEL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lpfSelPrp, LPF_SEL_PRP_MASK);
+        ADD_UNSIGNED_FIELD(absEnPrp, ABS_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(focusNoPrp, FOCUS_NO_PRP_MASK);
+        ADD_UNSIGNED_FIELD(lineFilterEnPrp, LINE_FILTER_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(ddcEnPrp, DDC_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(wmfEnPrp, WMF_EN_PRP_MASK);
+        ADD_UNSIGNED_FIELD(dpeEnPrp, DPE_EN_PRP_MASK);
+	}
+};
+
+#undef MLA_PRP_MASK
+#undef LINE_MODE_PRP_MASK
+#undef ATGC_SEL_PRP_MASK
+#undef STB_EN_PRP_MASK
+#undef STB_PRP_MASK
+#undef SUBTRACT_FILTER_EN_PRP_MASK
+#undef DC_CANCEL_EN_PRP_MASK
+#undef NCO_FREQ_SEL_PRP_MASK
+#undef LPF_SEL_PRP_MASK
+#undef ABS_EN_PRP_MASK
+#undef FOCUS_NO_PRP_MASK
+#undef LINE_FILTER_EN_PRP_MASK
+#undef DDC_EN_PRP_MASK
+#undef WMF_EN_PRP_MASK
+#undef DPE_EN_PRP_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif

include/model/hardware/core/register/dsp/registerDefinition/StbCoefficient.h

@@ -0,0 +1,50 @@
+#ifndef STBCOEFFICIENT_H
+#define STBCOEFFICIENT_H
+
+#include "model/hardware/core/register/RegisterChain.h"
+//#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define STB_LUT_EVEN_MASK   0x0000FFFF
+#define STB_LUT_ODD_MASK    0xFFFF0000
+
+#define BAR     0
+#define OFFSET  0x86000
+#define LENGTH  4U      // 8/2
+
+class StbCoefficient : public RegisterChain
+{
+private:
+    QList<quint32> _stbLut;
+
+    void prepareData(quint32 index) override
+    {
+        stbLutEven->setValue(_stbLut.at(static_cast<qint32>(index*2)));
+        stbLutOdd ->setValue(_stbLut.at(static_cast<qint32>(index*2 + 1)));
+    }
+
+public:
+    Field* stbLutEven;
+    Field* stbLutOdd;
+
+    void setStbLut (QList<quint32>& stbLut) {
+         _stbLut = stbLut;
+    }
+
+    StbCoefficient(SonoDevice* device) : RegisterChain(BAR, OFFSET, device, LENGTH)
+    {
+        ADD_UNSIGNED_FIELD(stbLutEven, STB_LUT_EVEN_MASK);
+        ADD_UNSIGNED_FIELD(stbLutOdd , STB_LUT_ODD_MASK );
+    }
+};
+
+#undef STB_LUT_EVEN_MASK
+#undef STB_LUT_ODD_MASK
+
+#undef BAR
+#undef OFFSET
+#undef LENGTH
+
+#endif // STBCOEFFICIENT_H

include/model/hardware/core/register/fpgaProgram/FpgaProgram.h

@@ -0,0 +1,50 @@
+#ifndef FPGAPROGRAM_H
+#define FPGAPROGRAM_H
+
+#include <QDataStream>
+#include "registerDefinition/SlaveFpgaNumber.h"
+#include "registerDefinition/SerialProgramData.h"
+#include "registerDefinition/SerialProgramStatus.h"
+
+//#define FPGA_S0_DONE        1
+//#define FPGA_S1_DONE        2
+//#define FPGA_S2_DONE        4
+
+#define FPGA_S0_INIT_B      1
+#define FPGA_S1_INIT_B      2
+#define FPGA_S2_INIT_B      4
+
+class FpgaProgram
+{
+private:  
+    SerialProgramData*      _progData;
+    SlaveFpgaNumber*        _fpgaNumber;
+
+    struct ProgramStatus {
+        SerialProgramStatus*    _progStatus;
+        bool getProgramBusy() const;
+        bool getProgramDone() const;
+        bool getProgramFail() const;
+        bool getInitFail() const;
+        bool getProgramTimeout() const;
+        bool getFpgaS0InitB() const;
+        bool getFpgaS1InitB() const;
+        bool getFpgaS2InitB() const;
+//        bool getFpgaS0Done();
+//        bool getFpgaS1Done();
+//        bool getFpgaS2Done();
+    }_status;
+
+    void setSlaveFpgaNumber (quint8& number) const;
+
+public:
+    explicit FpgaProgram(SonoDevice* device);
+    ~FpgaProgram();
+
+    void program(QByteArray& bitFileData, quint8 number);
+
+};
+
+quint32 byteArray2Uint32BigEndian(QByteArray& data);
+
+#endif // PROGRAM_H

include/model/hardware/core/register/fpgaProgram/registerDefinition/SerialProgramData.h

@@ -0,0 +1,30 @@
+#ifndef SERIALPROGRAMDATA_H
+#define SERIALPROGRAMDATA_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define SLAVE_CONFIG_DATA_MASK  0xFFFFFFFF
+
+#define BAR     0U
+#define OFFSET  0X400
+
+class SerialProgramData : public Register
+{
+public:
+    Field* slaveConfigData;
+
+    SerialProgramData(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(slaveConfigData, SLAVE_CONFIG_DATA_MASK);
+	}
+};
+
+#undef SLAVE_CONFIG_DATA_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/fpgaProgram/registerDefinition/SerialProgramStatus.h

@@ -0,0 +1,54 @@
+#ifndef SERIALPROGRAMSTATUS_H
+#define SERIALPROGRAMSTATUS_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define BUSY_MASK               0x00000001
+#define PROG_DONE_MASK          0x00000002
+#define PROG_FAIL_MASK          0x00000004
+#define INIT_FAIL_MASK          0x00000008
+#define TIMEOUT_MASK            0x00000010
+#define SLAVE_FPGA_DONE_MASK    0x00000F00
+#define SLAVE_FPGA_INIT_B_MASK  0x0000F000
+
+#define BAR     0U
+#define OFFSET  0x404
+
+class SerialProgramStatus : public Register
+{
+public:
+	Field* busy;
+	Field* progDone;
+	Field* progFail;
+	Field* initFail;
+	Field* timeout;
+	Field* slaveFpgaDone;
+	Field* slaveFpgaInitB;
+
+    SerialProgramStatus(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(busy, BUSY_MASK);
+        ADD_UNSIGNED_FIELD(progDone, PROG_DONE_MASK);
+        ADD_UNSIGNED_FIELD(progFail, PROG_FAIL_MASK);
+        ADD_UNSIGNED_FIELD(initFail, INIT_FAIL_MASK);
+        ADD_UNSIGNED_FIELD(timeout, TIMEOUT_MASK);
+        ADD_UNSIGNED_FIELD(slaveFpgaDone, SLAVE_FPGA_DONE_MASK);
+        ADD_UNSIGNED_FIELD(slaveFpgaInitB, SLAVE_FPGA_INIT_B_MASK);
+	}
+};
+
+#undef BUSY_MASK
+#undef PROG_DONE_MASK
+#undef PROG_FAIL_MASK
+#undef INIT_FAIL_MASK
+#undef TIMEOUT_MASK
+#undef SLAVE_FPGA_DONE_MASK
+#undef SLAVE_FPGA_INIT_B_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/fpgaProgram/registerDefinition/SlaveFpgaNumber.h

@@ -0,0 +1,30 @@
+#ifndef SLAVEFPGANUMBER_H
+#define SLAVEFPGANUMBER_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define NUMBER_MASK     0x00000003
+
+#define BAR     0U
+#define OFFSET  0x408
+
+class SlaveFpgaNumber : public Register
+{
+public:
+    Field* number;
+
+    SlaveFpgaNumber(SonoDevice* device) : Register(BAR, OFFSET, device)
+    {
+        ADD_UNSIGNED_FIELD(number, NUMBER_MASK);
+    }
+};
+
+#undef NUMBER_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif // SLAVEFPGANUMBER_H

include/model/hardware/core/register/scenPlayer/ScenPlayer.h

@@ -0,0 +1,35 @@
+#ifndef SCENPLAYER_H
+#define SCENPLAYER_H
+
+#include "registerDefinition/ScenPlayerCtrl.h"
+#include "registerDefinition/ScenPlayerEndIndex.h"
+#include "registerDefinition/ScenPlayerErrorCount.h"
+#include "registerDefinition/ScenPlayerStartIndex.h"
+
+class ScenPalyer
+{
+private:
+    ScenPlayerEndIndex*     _playerEndIdx;
+    ScenPlayerStartIndex*   _playerStartIdx;
+    ScenPlayerErrorCount*   _playerErrorCnt;
+    struct PlayerControl
+    {
+        ScenPlayerCtrl*     _playerctrl;
+        void command(bool start) const;
+        void pause (bool pause) const;
+    };
+
+public:
+
+    explicit ScenPalyer(SonoDevice* device);
+    ~ScenPalyer();
+
+    PlayerControl control;
+
+    void setStartIndex (quint32 strIdx);
+    void setEndIndex (quint32 endIdx);
+    quint32 getErrorCount(void) const;
+
+};
+
+#endif // SCENPLAYER_H

include/model/hardware/core/register/scenPlayer/registerDefinition/ScenPlayerCtrl.h

@@ -0,0 +1,34 @@
+#ifndef SCENPLAYERCTRL_H
+#define SCENPLAYERCTRL_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define START_MASK  0x00000001
+#define PAUSE_MASK  0x00000004
+
+#define BAR     0U
+#define OFFSET  0
+
+class ScenPlayerCtrl : public Register
+{
+public:
+	Field* start;
+	Field* pause;
+
+    ScenPlayerCtrl(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(start, START_MASK);
+        ADD_UNSIGNED_FIELD(pause, PAUSE_MASK);
+	}
+};
+
+#undef START_MASK
+#undef PAUSE_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/scenPlayer/registerDefinition/ScenPlayerEndIndex.h

@@ -0,0 +1,30 @@
+#ifndef SCENPLAYERENDINDEX_H
+#define SCENPLAYERENDINDEX_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define END_INDEX_MASK    0x0001FFFF
+
+#define BAR     0U
+#define OFFSET  0X808
+
+class ScenPlayerEndIndex : public Register
+{
+public:
+    Field* endIndex;
+
+    ScenPlayerEndIndex(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(endIndex, END_INDEX_MASK);
+	}
+};
+
+#undef END_INDEX_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/scenPlayer/registerDefinition/ScenPlayerErrorCount.h

@@ -0,0 +1,30 @@
+#ifndef SCENPLAYERERRORCOUNT_H
+#define SCENPLAYERERRORCOUNT_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define ERROR_COUNT_MASK    0x0000FFFF
+
+#define BAR     0U
+#define OFFSET  0X80C
+
+class ScenPlayerErrorCount : public Register
+{
+public:
+	Field* errorCount;
+
+    ScenPlayerErrorCount(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(errorCount, ERROR_COUNT_MASK);
+	}
+};
+
+#undef ERROR_COUNT_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/core/register/scenPlayer/registerDefinition/ScenPlayerStartIndex.h

@@ -0,0 +1,30 @@
+#ifndef SCENPLAYERSTARTINDEX_H
+#define SCENPLAYERSTARTINDEX_H
+
+#include "model/hardware/core/register/Register.h"
+#include "model/hardware/core/register/RegUtils.h"
+
+#undef  BAR
+
+#define START_INDEX_MASK    0x0001FFFF
+
+#define BAR     0U
+#define OFFSET  0X804
+
+class ScenPlayerStartIndex : public Register
+{
+public:
+	Field* startIndex;
+
+    ScenPlayerStartIndex(SonoDevice* device) : Register(BAR, OFFSET, device)
+	{
+        ADD_UNSIGNED_FIELD(startIndex, START_INDEX_MASK);
+	}
+};
+
+#undef START_INDEX_MASK
+
+#undef BAR
+#undef OFFSET
+
+#endif

include/model/hardware/device/SonoConfig.h

@@ -0,0 +1,32 @@
+#ifndef SONOADDRESS_H
+#define SONOADDRESS_H
+
+#define BAR 2
+
+
+#define SW_BUFFER_NUM 100
+#define HW_BUFFER_NUM 16
+#define BUFFER_SIZE 4 * 1024 * 1024
+
+#define COUNTER_REG 0x00002020
+#define RAM_OFFSET_REG 0x00002024
+#define XFER_OPT_REG 0x00002028
+#define XFER_RATE_REG 0x0000202C
+#define CONTROL_REG 0x00000800
+
+#define START_COMMAND 0x00000001
+#define STOP_COMMAND 0x00000000
+
+#define COUNTER_MASK 0x0000001F
+
+#define RAM_OFFSET_MASK 0x00FFFFFF
+
+#define XFER_LEN_MASK 0x007FFFFF
+
+#define AUTO_INC_COMMAND 0x40000000
+
+#define PERF_MODE_COMMAND 0x80000000
+
+#define XFER_RATE_MASK 0x003FFFFF
+
+#endif //SONOADDRESS_H

include/model/hardware/device/SonoDevice.h

@@ -0,0 +1,36 @@
+#ifndef SONODEVICE_H
+#define SONODEVICE_H
+
+#include <QObject>
+
+#include "SonoPcieDevice.h"
+#include "SonoConfig.h"
+
+class SonoDevice
+{
+private:
+    char* _buffers[SW_BUFFER_NUM];
+
+public:
+	SonoPcieDevice device;
+
+	SonoDevice();
+	~SonoDevice();
+
+	void init();
+    void startTransfer(bool emulatorEn);
+	void stopTransfer();
+	int getCounter();
+	void setRamOffsetAddress(qint32 offset);
+	void setTransferLength(qint32 length);
+	void setTransferRate(float rate);
+	void setOptions(bool performanceMode);
+	void setMode(bool dynamicMode);
+    void copy(int srcIndex, int dstIndex);
+	void show(int i);
+    void log(int i);
+	void fillRam();
+    const char* getBufferPtr(int index);
+};
+
+#endif //SONODEVICE_H

main.cpp

@@ -0,0 +1,20 @@
+#include "mainwindow.h"
+#include <QStyle>
+#include <QDesktopWidget>
+#include <QApplication>
+
+int main(int argc, char *argv[])
+{
+    QApplication a(argc, argv);
+    MainWindow w;
+    w.setGeometry(
+        QStyle::alignedRect(
+            Qt::LeftToRight,
+            Qt::AlignCenter,
+            w.size(),
+            qApp->desktop()->availableGeometry()
+        )
+    );
+    w.show();
+    return a.exec();
+}

mainwindow.h

@@ -0,0 +1,327 @@
+#ifndef MAINWINDOW_H
+#define MAINWINDOW_H
+
+#include <QTimer>
+#include <QLabel>
+#include <QList>
+#include <QDebug>
+#include <QSettings>
+#include <QtConcurrent/QtConcurrent>
+#include <QMessageBox>
+#include <QFileDialog>
+#include <QMainWindow>
+#include "include/model/hardware/core/TrxBoard.h"
+#include "api.h"
+
+#define MESSAGE_BOX(M)  \
+    emit showMessage(M)
+
+#define SCENARIO_FILE_PATH "scenarioFilePath"
+#define ADC_SIM_FILE_PATH "adcSimFilePath"
+#define PARAM_FILE_PATH "paramFilePath"
+#define TX_DAC_FILE_PATH "txDacFilePath"
+#define FPGA_FILE_PATH "fpgaFilePath"
+#define REG_ACCESS_SEL "regAccessType"
+
+
+#define START   "Start"
+#define STOP    "Stop"
+
+#define PAUSE   "Pause"
+#define RESUME   "Resume"
+
+#define ON  "On"
+#define OFF "Off"
+
+#define HV_ON  "HV_On"
+#define HV_OFF "HV_Off"
+
+#define MOTOR_ON  "Motor_On"
+#define MOTOR_OFF "Motor_Off"
+
+#define PWR1_ON  "Pwr1_On"
+#define PWR1_OFF "Pwr1_Off"
+
+#define PWR2_ON  "Pwr2_On"
+#define PWR2_OFF "Pwr2_Off"
+
+#define PWR3_ON  "Pwr3_On"
+#define PWR3_OFF "Pwr3_Off"
+
+#define PWR4_ON  "Pwr4_On"
+#define PWR4_OFF "Pwr4_Off"
+
+#define TRIG_ON "Trig_On"
+#define TRIG_OFF "Trig_Off"
+
+#define THSD_State_Update "THSD State Update"
+
+#define DACS_ENABLE "DACs_Enable"
+
+#define UPDATE      "Update"
+
+#define VALID       "Valid"
+
+#define ENABLE      "Enable"
+#define DISABLE     "Disable"
+
+
+QT_BEGIN_NAMESPACE
+namespace Ui { class MainWindow; }
+QT_END_NAMESPACE
+
+class MainWindow : public QMainWindow
+{
+    Q_OBJECT
+
+public:
+    MainWindow(QWidget *parent = nullptr);
+    ~MainWindow();
+
+private:
+    Ui::MainWindow *ui;
+
+    TrxBoard trx;
+
+    //WaitDialog* _dial;
+
+    QSettings* _settings;
+
+    UltraSoundDevice* _usd;
+
+    QTimer* _timer;
+
+    int _counter = 0;
+
+    bool _run;
+
+    BoardsCtrlMngt* _bCtrl;
+
+    ReceiverConfiguration* _receiveConfig;
+    void setReceiverConfiguration (void);
+
+    QList<quint32> _lineFilter;
+    void setLineFilter (void);
+
+    QList<quint32> _freq;
+    void setFreqLut (void);
+
+    QList<quint32> _stb;
+    void setStbCoeff (void);
+
+    QList<quint32> _dTgc;
+    void setDTgc (void);
+
+    QList<QList<quint32>> _aTgc;
+    void setATgc (void);
+
+    QList<QList<quint32>> _blendWeight;
+    void setBlendWeight (void);
+
+    QList<QList<quint32>> _lpf;
+    void setLpf (void);
+
+    //void fpgaProgrammer(QString path);
+
+    void timeout();
+
+    void changeLabelTextColor(QLabel* label, QColor color);
+
+private slots:
+
+    void on_rbtn_reg_toggled(bool checked);
+
+    void on_rbtn_offset_toggled(bool checked);
+
+    void on_btn_readReg_clicked();
+
+    void on_btn_writeReg_clicked();
+
+    //    void newBlockProgressValue(int percentage, QProgressBar* prg);
+    //    void newFpgaProgressValue(int percentage);
+
+    //    void newBlockProgressVisibility(bool show, QProgressBar* prg);
+
+    //    void newFpgaProgressVisibility(bool show);
+
+
+    void on_btn_fpgaBrowse_clicked();
+
+    void on_btn_fpgaProgram_clicked();
+
+    void newMessage(QString message);
+
+//    void threadFinished();
+
+//    void on_btn_scenarioBrowse_clicked();
+
+//    void on_btn_scenarioVerify_clicked();
+
+//    void on_btn_ParamBrowse_clicked();
+
+//    void on_btn_scenarioUpload_clicked();
+
+//    void on_btn_scenarioStartStop_clicked();
+
+//    void on_btn_scenarioPauseResume_clicked();
+
+//    void on_btn_txDacBrowse_clicked();
+
+//    void on_btn_txDacUpload_clicked();
+
+//    void on_btn_txDacStartStop_clicked();
+
+//    void on_btn_txDacOnOff_clicked();
+
+    void on_cb_selectedProbe_currentIndexChanged(int index);
+
+//    void on_btn_pllClkSt_clicked();
+
+//    void on_btn_pllClkTps_clicked();
+
+//    void on_btn_HVOnOff_clicked();
+
+//    void on_btn_motorOnOff_clicked();
+
+//    void on_btn_pwr1OnOff_clicked();
+
+//    void on_btn_pwr2OnOff_clicked();
+
+//    void on_btn_pwr3OnOff_clicked();
+
+//    void on_btn_pwr4OnOff_clicked();
+
+    void delay(int ms);
+
+//    float resDiv(uint32_t r1, uint32_t r2, uint adcValue);
+
+//    void on_btn_mulDacTrig_clicked();
+
+//    void on_btn_thsdStateUpdate_clicked();
+
+//    void on_pushButton_3_clicked();
+
+//    void on_btn_hvRegulatorConfig_clicked();
+
+//    void on_btn_pm5RegulatorConfig_clicked();
+
+//    void on_btn_pwrDacsEnable_clicked();
+
+//    void on_btn_DacsOnOff_clicked();
+
+    void on_btn_updateRdbackValue_clicked();
+
+//    void on_btn_supJump_clicked();
+
+//    void on_chk_sup24v_stateChanged(int arg1);
+
+
+//    void on_btn_dmaStart_2_clicked();
+
+//    void on_btn_dmaStop_2_clicked();
+
+//    void on_btn_dmaBrowse_2_clicked();
+
+//    void on_btn_dmaShow_2_clicked();
+
+//    void on_chk_usrMulDac_stateChanged(int arg1);
+
+//    void on_btn_afeProg_clicked();
+
+//    void on_btn_gtReg_clicked();
+
+//    void on_btn_browse_clicked();
+
+//    void on_btn_dbgTransferStrt_clicked();
+
+//    void on_btn_adcLoggerStrt_clicked();
+
+//    void on_prg_adcLoggerFileWr_valueChanged(int value);
+
+//    void on_btn_adcSimBrowse_clicked();
+
+//    void on_btn_adcSimStart_clicked();
+
+//    void on_btn_adcLoggerAutoCount_clicked();
+
+//    void on_btn_eepromTest_clicked();
+
+//    void on_btn_scenRead_clicked();
+
+//    void on_btn_getFpgaVersion_clicked();
+
+//    void on_btn_txTrig_clicked();
+
+//private:
+
+
+
+//    QString _logFolder = "/home/hasis/Desktop/TrxBoardFile/_log/dma/";
+//    QString _adcloggerFolder = "/home/hasis/Desktop/TrxBoardFile/_log/adc/";
+//    QVector<QByteArray> _dmaBuffer;
+//    QByteArray _lastBuffer;
+//    QMutex _mutex;
+//    int _dmaLogCount = 0;
+//    bool _dmaRun;
+//    bool _dmaLog = false;
+//    bool _csvReadStopFlag = false;
+//    bool _adcLoggerDone = false;
+//    bool _adcLoggerTrnsDone = false;
+//    int _swCounter;
+//    int _hwCounter;
+
+//    void readPcie();
+//    void logPcie();
+
+//    void adcLoggerStatusCheck();
+
+//    QString WhichFpgaFailed(quint32 status);
+//    void binFileUploader(quint32 bar, quint32 offset, QString path, QProgressBar* prg);
+//    void binAdcFileUploader(quint32 bar, QString path, QProgressBar* prg);
+//    void CsvFileUploader(quint32 bar, QString path, QProgressBar *prg);
+//    void CsvFileChecker(quint32 bar, QString pathBase, QString pathTarget, QProgressBar* prg);
+//    void AdcLogCsvFileWriter(QString folderPath, QProgressBar* prg);
+//    void scenarioFileVerifier(quint32 bar, quint32 offset, QString path);
+//
+//    quint64 byteArrayTo64LittleEndian(QByteArray data);
+//    quint32 byteArrayTo32LittleEndian(QByteArray data);
+//    quint32 byteArrayTo32BigEndian(QByteArray data);
+
+//
+    
+//    void scenarioStart();
+//    void scenarioStop();
+
+//    bool checkTermalShutdown(quint8 value);
+
+
+    void on_btn_receiveConfig_clicked();
+
+    void on_btn_lineFilter_clicked();
+
+    void on_btn_freqLut_clicked();
+
+    void on_btn_blendWeight_clicked();
+
+    void on_btn_atgc_clicked();
+
+    void on_btn_dtgc_clicked();
+
+    void on_btn_lpf_clicked();
+
+    void on_btn_stbCoeff_clicked();
+
+    void on_btn_setAtgcMode_clicked();
+
+signals:
+//    void updateBlockProgressValue(int percentage, QProgressBar* prg);
+//    void updateFpgaProgressValue(int percentage);
+
+//    void updateBlockProgressVisibility(bool show, QProgressBar* prg);
+//    void updateFpgaProgressVisibility(bool show);
+
+    void showMessage(QString message);
+
+};
+#endif // MAINWINDOW_H
+

src/model/hardware/core/TrxBoard.cpp

@@ -0,0 +1,666 @@
+#include "model/hardware/core/TrxBoard.h"
+
+#include <QtConcurrent/QtConcurrent>
+#include <chrono>
+#include <thread>
+
+/*************************************************************************************************/
+/**
+ * @brief Return board name
+ * @details The function will return the name of hardware based on hardware
+ * provided data
+ * @attention This value is a shadow value, to update it call @updateInfo()
+ * @return The name of board
+ */
+QString TrxBoard::getName()
+{
+    return _name;
+}
+
+/*************************************************************************************************/
+/**
+ * @brief Return board version
+ * @details The function will return the version of hardware based on hardware
+ * provided data
+ * @attention This value is a shadow value, to update it call @updateInfo()
+ * @return The version of board
+ */
+QString TrxBoard::getVersion()
+{
+    return _version;
+}
+
+/*************************************************************************************************/
+/**
+ * @brief PowerBoard::selfTest
+ * @return
+ */
+bool TrxBoard::selfTest()
+{
+    return true;
+}
+
+/*************************************************************************************************/
+/**
+ * @brief TrxBoard::updateInfo
+ * @return
+ */
+/*************************************************************************************************/
+bool TrxBoard::updateInfo()
+{
+    return true;
+}
+
+/*************************************************************************************************/
+/**
+ * @brief TrxBoard::updateStatus
+ * @return
+ */
+/*************************************************************************************************/
+bool TrxBoard::updateStatus()
+{
+    return true;
+}
+
+///*************************************************************************************************/
+///**
+// * @brief TrxBoard::slaveProgramming
+// */
+///*************************************************************************************************/
+//void fpgaProgrammer (QString path)
+//{
+//    QFile file(path);
+
+//    if (!file.open(QFile::ReadOnly))
+//    {
+//        MESSAGE_BOX("Could not open bit file, aborting operation");
+//        return;
+//    }
+//    const auto actualSize = file.size();
+//    auto readSize = 0;
+//    while(readSize < actualSize)
+//    {
+//        QByteArray chunk = file.read(4);
+//        _slaveProgRegs.setSlaveProg(chunk);
+//        try
+//        {
+//            auto temp = _slaveProgRegs.getSlaveProgStatus();
+//            while ((temp & 0x01) == 0x01)
+//            {
+//                temp = _slaveProgRegs.getSlaveProgStatus();
+//            }
+
+//            if((temp & 0x08) == 0x08)
+//            {
+//                QString failedFpga = _slaveProgRegs.WhichFpgaFailed(temp);
+//                QString a = "init_fail flag raised, Failed FPGAs: " + failedFpga;
+//                throw(myexception(a.toUtf8().data()));
+//            }
+
+//            if((temp & 0x10) == 0x10)
+//            {
+//                throw(myexception("time_out flag raised"));
+//            }
+//        }
+//        catch (myexception e)
+//        {
+//            MESSAGE_BOX(e.what());
+
+//            emit updateFpgaProgressVisibility(false);
+
+//            file.close();
+
+//            return;
+//        }
+//        readSize += 4;
+
+//        auto percentage = (readSize * 100 / actualSize);
+//        emit updateFpgaProgressValue(percentage);
+//    }
+
+//    auto temp = _slaveProgRegs.getSlaveProgStatus();
+//    while(((temp >> 1) & 0x03) == 0)
+//    {
+//        temp = _slaveProgRegs.getSlaveProgStatus();
+//    }
+
+//    if((temp & 0x02) == 0x02)
+//    {
+//        MESSAGE_BOX("FPGA programming finished with success");
+//    }
+//    else if((temp & 0x04) == 0x04)
+//    {
+//        QString failedFpga = _slaveProgRegs.WhichFpgaFailed(temp);
+
+//        MESSAGE_BOX("FPGA programming failed, Failed FPGAs: " + failedFpga);
+//    }
+
+//    emit updateFpgaProgressVisibility(false);
+
+//    file.close();
+//}
+
+/*************************************************************************************************/
+/**
+ * @brief TrxBoard::start
+ */
+/*************************************************************************************************/
+void TrxBoard::start()
+{
+    _device.stopTransfer();
+
+    _swCounter = 0;
+    _hwCounter = _device.getCounter();
+
+    _device.setRamOffsetAddress(0);
+    _device.setTransferLength(128 * 1024);
+    _device.setOptions(false);
+    _device.setMode(true);
+    _device.setTransferRate(25.0f);
+
+    _device.startTransfer(true);
+    _run = true;
+    //QtConcurrent::run(this, &TrxBoard::readData);
+}
+
+/*************************************************************************************************/
+/**
+ * @brief TrxBoard::stop
+ */
+/*************************************************************************************************/
+void TrxBoard::stop()
+{
+    _device.stopTransfer();
+    _run = false;
+}
+
+/*************************************************************************************************/
+/**
+ * @brief TrxBoard::readData
+ */
+/*************************************************************************************************/
+//void TrxBoard::readData()
+//{
+//    while(_run)
+//    {
+//        auto cnt = _device.getCounter();
+
+//        if(cnt == 0)
+//        {
+//            std::this_thread::sleep_for(std::chrono::milliseconds(3));
+//            _hwCounter = 0;
+//            continue;
+//        }
+//        else
+//        if(cnt != _hwCounter)
+//        {
+//            _hwCounter++;
+
+//            _device.copy(_hwCounter - 1, _swCounter);
+
+//            auto temp = QByteArray::fromRawData(_device.getBufferPtr(_swCounter), BUFFER_SIZE);
+//            packetEngine.newData(temp);
+
+//            _swCounter++;
+//            if(_swCounter >= SW_BUFFER_NUM)
+//            {
+//                _swCounter = 0;
+//            }
+//        }
+//    }
+//}
+/*************************************************************************************************/
+/*************************************************************************************************/
+
+
+
+
+
+void TrxBoard::scenParamsFilling(TrxBoard::eScenParams cmd)
+{
+    static quint8 scenParams = 0;
+    scenParams = cmd ? (scenParams+cmd) : (cmd);
+    if (scenParams >= TOTAL_SCEN_LUT_SRAM)
+    {
+        scenParams = TOTAL_SCEN_LUT_SRAM;
+        _allow = true;
+    }
+    else
+        _allow = false;
+}
+
+void TrxBoard::setSwapVector()
+{
+    _swapVec.clear();
+    _swapVec  << 0    << 113  << 98   << 19   << 4    << 117  << 102  << 23   << 8    << 121  << 106  << 27   << 12   << 125  << 110  << 31   << 16   << 1    << 114  << 99
+              << 20   << 5    << 118  << 103  << 24   << 9    << 122  << 107  << 28   << 13   << 126  << 111  << 96   << 17   << 2    << 115  << 100  << 21   << 6    << 119
+              << 104  << 25   << 10   << 123  << 108  << 29   << 14   << 127  << 112  << 97   << 18   << 3    << 116  << 101  << 22   << 7    << 120  << 105  << 26   << 11
+              << 124  << 109  << 30   << 15   << 32   << 145  << 130  << 51   << 36   << 149  << 134  << 55   << 40   << 153  << 138  << 59   << 44   << 157  << 142  << 63
+              << 48   << 33   << 146  << 131  << 52   << 37   << 150  << 135  << 56   << 41   << 154  << 139  << 60   << 45   << 158  << 143  << 128  << 49   << 34   << 147
+              << 132  << 53   << 38   << 151  << 136  << 57   << 42   << 155  << 140  << 61   << 46   << 159  << 144  << 129  << 50   << 35   << 148  << 133  << 54   << 39
+              << 152  << 137  << 58   << 43   << 156  << 141  << 62   << 47   << 64   << 177  << 162  << 83   << 68   << 181  << 166  << 87   << 72   << 185  << 170  << 91
+              << 76   << 189  << 174  << 95   << 80   << 65   << 178  << 163  << 84   << 69   << 182  << 167  << 88   << 73   << 186  << 171  << 92   << 77   << 190  << 175
+              << 160  << 81   << 66   << 179  << 164  << 85   << 70   << 183  << 168  << 89   << 74   << 187  << 172  << 93   << 78   << 191  << 176  << 161  << 82   << 67
+              << 180  << 165  << 86   << 71   << 184  << 169  << 90   << 75   << 188  << 173  << 94   << 79;
+}
+
+TrxBoard::TrxBoard() : _offsetSlave0(0), _offsetSlave1(0x4000000), _offsetSlave2(0x8000000)
+{
+    _beamFormerSlave0   = new BeamFormer      (&_device, _offsetSlave0);
+    _beamFormerSlave1   = new BeamFormer      (&_device, _offsetSlave1);
+    _beamFormerSlave2   = new BeamFormer      (&_device, _offsetSlave2);
+    _clkDistributer     = new ClockDistributer(&_device);
+    _fpgaProgram        = new FpgaProgram     (&_device);
+    _scenPlayer         = new ScenPalyer      (&_device);
+    _bCtrlMngt          = new BoardsCtrlMngt  (&_device);
+    _bpiFlash           = new BpiFlash        (&_device);
+    //_dmaCtrl          = new DmaCtrl         (_device);
+    _dsp                = new Dsp             (&_device);
+
+    setSwapVector();
+
+    ///////////////////////////////// Old TRX //////////////////////////////////
+    _run = true;
+    //_device.init();
+    /*************************************************************************************************/
+    /*************************************************************************************************/
+}
+
+TrxBoard::~TrxBoard()
+{
+    delete  _beamFormerSlave0;
+    delete  _beamFormerSlave1;
+    delete  _beamFormerSlave2;
+    delete  _clkDistributer;
+    delete  _fpgaProgram;
+    delete  _scenPlayer;
+    delete  _bCtrlMngt;
+    delete  _bpiFlash;
+    //delete  _dmaCtrl;
+    delete  _dsp;
+}
+
+void TrxBoard::scenProbeElementPosition(ProbeElementPosition *element)
+{
+    QList<QList<quint32>> elementPosition;
+    QList<quint32> x;
+    QList<quint32> y;
+    QList<quint32> z;
+
+    for (quint8 i=0; i<3; i++)
+    {
+        for (quint8 j=0; j<SLAVE_ELEMENT_SEGMENT; j++)
+        {
+            x.append(element->xPosition.at(_swapVec.at(j + i * SLAVE_ELEMENT_SEGMENT)));
+            y.append(element->yPosition.at(_swapVec.at(j + i * SLAVE_ELEMENT_SEGMENT)));
+            z.append(element->zPosition.at(_swapVec.at(j + i * SLAVE_ELEMENT_SEGMENT)));
+        }
+
+        elementPosition.append(x);
+        elementPosition.append(y);
+        elementPosition.append(z);
+
+        switch (i)
+        {
+            case 0 : this->_beamFormerSlave0->probeElementPosition(elementPosition); break;
+            case 1 : this->_beamFormerSlave1->probeElementPosition(elementPosition); break;
+            case 2 : this->_beamFormerSlave2->probeElementPosition(elementPosition); break;
+        }
+
+        x.clear();
+        y.clear();
+        z.clear();
+        elementPosition.clear();
+    }
+    scenParamsFilling(set);
+}
+
+void TrxBoard::scenRxBeamformerProperties(RxBeamformerProperties *rxBeamformer)
+{
+    this->_beamFormerSlave0->rxBeamformerProperties(rxBeamformer);
+    this->_beamFormerSlave1->rxBeamformerProperties(rxBeamformer);
+    this->_beamFormerSlave2->rxBeamformerProperties(rxBeamformer);
+    scenParamsFilling(set);
+}
+
+void TrxBoard::scenApodizationLut(QList<QList<quint32> > &apodization)
+{
+    this->_beamFormerSlave0->apodizationLut(apodization);
+    this->_beamFormerSlave1->apodizationLut(apodization);
+    this->_beamFormerSlave2->apodizationLut(apodization);
+    scenParamsFilling(set);
+}
+
+void TrxBoard::scenPulseProperties(PulseProperties *pulse)
+{
+    this->_beamFormerSlave0->pulseProperties(pulse);
+    this->_beamFormerSlave1->pulseProperties(pulse);
+    this->_beamFormerSlave2->pulseProperties(pulse);
+    scenParamsFilling(set);
+}
+
+void TrxBoard::scenAfeLut(AfeProperties *afe)
+{
+    this->_beamFormerSlave0->afeLut(afe);
+    this->_beamFormerSlave1->afeLut(afe);
+    this->_beamFormerSlave2->afeLut(afe);
+    scenParamsFilling(set);
+}
+
+
+void TrxBoard::scenReceiverConfigurationLut(ReceiverConfiguration *configLut) const
+{
+    this->_dsp->receiverConfigurationLut(configLut);
+}
+
+void TrxBoard::scenLineFilterCoefficient(QList<quint32> &lineFilterLut) const
+{
+    this->_dsp->lineFilterCoefficient(lineFilterLut);
+}
+
+void TrxBoard::scenStbCoefficient(QList<quint32> &stbLut) const
+{
+    this->_dsp->stbCoefficient(stbLut);
+}
+
+void TrxBoard::scenFrequencyLut(QList<quint32> &freqLut) const
+{
+    this->_dsp->frequencyLut(freqLut);
+}
+
+void TrxBoard::scenBlendWeight(QList<QList<quint32> > &blendWeight) const
+{
+    this->_dsp->blendWeight(blendWeight);
+}
+
+void TrxBoard::setAtgcMode(eAtgcMode mode, quint16 value) const
+{
+    this->_dsp->atgcMode(mode, value);
+}
+
+void TrxBoard::scenDtgcLut(QList<quint32> &dtgcLut) const
+{
+    this->_dsp->dtgcLut(dtgcLut);
+}
+
+void TrxBoard::scenAtgcLut(QList<QList<quint32> > &atgcLut) const
+{
+    this->_dsp->atgcLut(atgcLut);
+}
+
+void TrxBoard::scenLpfLut(QList<QList<quint32> > &lpfLut) const
+{
+    this->_dsp->lpfLut(lpfLut);
+}
+
+void TrxBoard::slaveFpgaProgram(QString path)
+{
+    QFile bitFile(path);
+
+    if (bitFile.fileName().isEmpty())
+    {
+        throw SonoException("No file is selected");
+    }
+
+    if (!bitFile.open(QIODevice::ReadOnly))
+    {
+        throw SonoException("Couldn't open bit file programming");
+    }
+
+    QByteArray bitFileData = bitFile.readAll();
+    this->_fpgaProgram->program(bitFileData, SLAVE_FPGA_NUMBER);
+
+    bitFileData.clear();
+    bitFile.close();
+
+    scenParamsFilling(clear);
+}
+
+void TrxBoard::setBeamFormerMode(eClkMode mode) const
+{
+    this->_clkDistributer->clockMode(CLOCK_DIVISION, mode);
+}
+
+void TrxBoard::setScenPlayerIndex(quint32 &startIdx, quint32 &endIdx) const
+{
+    this->_scenPlayer->setStartIndex(startIdx);
+    this->_scenPlayer->setEndIndex(endIdx);
+}
+
+void TrxBoard::scenPlayerStart(bool start) const
+{
+    if (_allow)
+    {
+        this->_beamFormerSlave0->regValid(true);
+        this->_beamFormerSlave1->regValid(true);
+        this->_beamFormerSlave2->regValid(true);
+    }
+    else
+    {
+        throw SonoException("Total scenario luts and sram parameters are not written compeletely");
+    }
+
+
+    this->_scenPlayer->control.command(start);
+}
+
+void TrxBoard::scenPlayerPause(bool pause) const
+{
+    this->_scenPlayer->control.pause(pause);
+}
+
+void TrxBoard::scenPlayerStop(bool stop) const
+{
+    this->_scenPlayer->control.command(!stop);
+}
+
+
+quint32 TrxBoard::deviceId() const
+{
+    auto pid = this->_bCtrlMngt->getPid();
+    return pid;
+}
+
+quint32 TrxBoard::vendorId() const
+{
+    auto vid = this->_bCtrlMngt->getVid();
+    return vid;
+}
+
+quint32 TrxBoard::trxId() const
+{
+    QByteArray id = this->_bCtrlMngt->trxEepromRead(EEPROM_ID_BYTE_BEGIN, EEPROM_ID_BYTE_NUMBER);
+    return byteArray2Uint32BigEndian(id);
+}
+
+quint32 TrxBoard::mpsId() const
+{
+    QByteArray id = this->_bCtrlMngt->mpsEepromRead(EEPROM_ID_BYTE_BEGIN, EEPROM_ID_BYTE_NUMBER);
+    return byteArray2Uint32BigEndian(id);
+}
+
+quint32 TrxBoard::prbCtrlId() const
+{
+    QByteArray id = this->_bCtrlMngt->prbCtrlEepromRead(EEPROM_ID_BYTE_BEGIN, EEPROM_ID_BYTE_NUMBER);
+    return byteArray2Uint32BigEndian(id);
+}
+
+quint32 TrxBoard::prbId(quint8 prbSel) const
+{
+    QByteArray id = this->_bCtrlMngt->prbEepromRead(EEPROM_ID_BYTE_BEGIN, EEPROM_ID_BYTE_NUMBER, prbSel);
+    return byteArray2Uint32BigEndian(id);
+}
+
+QList<quint32> TrxBoard::getConnectedPrbId() const
+{
+    QList<quint32> list;
+    QVector<bool> vec;
+    QByteArray id;
+    list.clear();
+    vec.clear();
+    id.clear();
+    vec = this->_bCtrlMngt->getConnectedPrb();
+
+    for (quint8 i=0; i < vec.size(); i++)
+    {
+        if (vec.at(i))
+        {
+            id = this->_bCtrlMngt->prbEepromRead(EEPROM_ID_BYTE_BEGIN, EEPROM_ID_BYTE_NUMBER, i);
+            list.append(byteArray2Uint32BigEndian(id));
+        }
+        else
+            list.append(0);
+    }
+
+    return list;
+}
+
+QString TrxBoard::trxInfo() const
+{
+    QString str = QString(this->_bCtrlMngt->trxEepromRead(EEPROM_INFO_BYTE_BEGIN, EEPROM_INFO_BYTE_NUMBER));
+    return str;
+}
+
+QString TrxBoard::mpsInfo() const
+{
+    QString str = QString(this->_bCtrlMngt->mpsEepromRead(EEPROM_INFO_BYTE_BEGIN, EEPROM_INFO_BYTE_NUMBER));
+    return str;
+}
+
+QString TrxBoard::prbCtrlInfo() const
+{
+    QString str = QString(this->_bCtrlMngt->prbCtrlEepromRead(EEPROM_INFO_BYTE_BEGIN, EEPROM_INFO_BYTE_NUMBER));
+    return str;
+}
+
+QString TrxBoard::prbInfo(quint8 prbSel) const
+{
+    QString str = QString(this->_bCtrlMngt->prbEepromRead(EEPROM_INFO_BYTE_BEGIN, EEPROM_INFO_BYTE_NUMBER, prbSel));
+    return str;
+}
+
+QList<QString> TrxBoard::getConnectedPrbInfo() const
+{
+    QList<QString> list;
+    QVector<bool> vec;
+    QString str;
+    list.clear();
+    vec.clear();
+    str.clear();
+
+    vec = this->_bCtrlMngt->getConnectedPrb();
+
+    for (quint8 i=0; i < vec.size(); i++)
+    {
+        if (vec.at(i))
+        {
+            str = QString(this->_bCtrlMngt->prbEepromRead(EEPROM_INFO_BYTE_BEGIN, EEPROM_INFO_BYTE_NUMBER, i));
+            list.append(str);
+        }
+        else
+            list.append("NULL");
+    }
+
+    return list;
+}
+
+
+void TrxBoard::supervisorRbValue(SupervisorRbValue *sValue) const
+{
+    this->_bCtrlMngt->getSupervisorValue(sValue);
+}
+
+void TrxBoard::mpsFaultStatus(MpsFaultStatus *faultStatus) const
+{
+    this->_bCtrlMngt->getMpsFault(faultStatus);
+}
+
+void TrxBoard::mpsReset() const
+{
+    this->_bCtrlMngt->setMpsReset();
+}
+
+void TrxBoard::mpsSetAo(float voltA, float voltB) const
+{
+    this->_bCtrlMngt->mpsHvSet(voltA, voltB);
+}
+
+
+void TrxBoard::selectProbe(eSelectProbe prbSel) const
+{
+    this->_bCtrlMngt->setProbeSelect(prbSel);
+}
+
+void TrxBoard::getHealthStatus(HealthStatus* healStat) const
+{
+//    healStat->criticalComponentTemperature = this->_bCtrlMngt->getTrxFpgaTemp();
+    healStat->systemTemperature = this->_bCtrlMngt->getTrxTempSensor();
+    healStat->adcMon = this->_bCtrlMngt->getTrxBoardVoltages();
+    healStat->voltsPg = this->_bCtrlMngt->getTrxVoltagesPg();
+}
+
+void TrxBoard::init() const
+{
+    this->_bCtrlMngt->mpsInit();
+    this->_bCtrlMngt->prbCtrlInit();
+}
+
+
+
+void TrxBoard::mcsProgram(QString path)
+{
+    QFile mcsFile(path);
+
+    if (mcsFile.fileName().isEmpty())
+    {
+        //throw exception("No file is selected: " + mcsFile.errorString());
+        return;
+    }
+
+    if (!mcsFile.open(QIODevice::ReadOnly))
+    {
+        //throw exception("Couldn't open mcs file programming: " + mcsFile.errorString());
+        return;
+    }
+
+    QByteArray mcsFileData = mcsFile.readAll();
+    this->_bpiFlash->writeMcs(mcsFileData);
+
+    mcsFileData.clear();
+    mcsFile.close();
+
+    scenParamsFilling(clear);
+}
+
+void TrxBoard::mcsVerify(QString path) const
+{
+    QFile mcsFile(path);
+
+    if (mcsFile.fileName().isEmpty())
+    {
+        //throw exception("No file is selected: " + mcsFile.errorString());
+        return;
+    }
+
+    if (!mcsFile.open(QIODevice::WriteOnly))
+    {
+        //throw exception("Couldn't open mcs file to verify: " + mcsFile.errorString());
+        return;
+    }
+
+    QList<quint32>* mcsList;
+    QTextStream save(&mcsFile);
+
+    (*mcsList).clear();
+    this->_bpiFlash->readMcs(mcsList);
+
+    for (auto i=0; i < MCS_FILE_SIZE; i++)
+    {
+        save << (*mcsList).at(i);
+    }
+    mcsFile.flush();
+    mcsFile.close();
+}
+
+
+

src/model/hardware/core/register/Field.cpp

@@ -0,0 +1,106 @@
+#include "model/hardware/core/register/Field.h"
+
+Field::Field(quint32 mask, bool isSigned)
+{
+	_mask = mask;
+	_isSigned = isSigned;
+
+	findPosition();
+	findLength();
+    findZeroBasedMask();
+}
+
+void Field::findLength()
+{
+	auto temp = _mask >> _position;
+
+	_length = 0;
+	while((temp & 0x01) == 0x01)
+	{
+		temp = temp >> 1;
+		_length++;
+	}
+}
+
+void Field::findPosition()
+{
+	auto temp = _mask;
+	_position = 0;
+	while((temp & 0x01) != 0x01)
+	{
+		temp = temp >> 1;
+		_position++;
+	}
+}
+
+void Field::findZeroBasedMask()
+{
+	_zeroBasedMask = 0;
+	for(auto i = 0; i < _length; i++)
+	{
+		_zeroBasedMask |= (1 << i);
+	}
+}
+
+Field* Field::fromBitPosition(quint32 bitPosition)
+{
+	auto mask = 1U << bitPosition;
+
+	return new Field(mask, false);
+}
+
+Field* Field::fromMaskSigned(quint32 mask)
+{
+	return new Field(mask, true);
+}
+
+Field* Field::fromMaskUnsigned(quint32 mask)
+{
+	return new Field(mask, false);
+}
+
+quint32 Field::getValue()
+{
+	return _value;
+}
+
+bool Field::isUpdated()
+{
+	auto temp = _isUpdated;
+	_isUpdated = false;
+
+	return temp;
+}
+
+void Field::setValue(quint32 value)
+{
+	if(_value == value)
+	{
+		return;
+	}
+
+	_value = value;
+	_isUpdated = true;
+}
+
+void Field::updateValue(quint32 value)
+{
+	value = value >> _position;
+	value &= _zeroBasedMask;
+	auto signBit = ((value >> (_length - 1)) & 0x01) == 0x01;
+	if(_isSigned && signBit)
+	{
+		value |= ~_zeroBasedMask;
+	}
+
+	_value = value;
+}
+
+quint32 Field::getRegisterWriteValue()
+{
+	auto value = _value & _zeroBasedMask;
+	value = value << _position;
+	value &= _mask;
+
+	return value;
+}

src/model/hardware/core/register/Register.cpp

@@ -0,0 +1,107 @@
+#include "model/hardware/core/register/Register.h"
+
+#include <QDebug>
+
+//Register::Register(quint8 bar, quint32 offset, SonoDevice *device, quint32 arrayLength)
+Register::Register(quint8 bar, quint32 offset, SonoDevice *device)
+{
+    _bar            = bar;
+    _offset         = offset;
+   // _arrayLength    = arrayLength;
+    _device         = device;
+}
+
+Register::~Register()
+{
+	for(auto i = 0; i < _fields.length(); i++)
+	{
+		delete _fields[i];
+	}
+	_fields.clear();
+}
+
+quint32 Register::getValue()
+{
+	return _value;
+}
+
+void Register::setValue(quint32 value)
+{
+	if(_value == value)
+	{
+		return;
+	}
+
+	_value = value;
+    _isUpdated = true;
+}
+
+void Register::changeOffset(quint32 offset)
+{
+    _offset = offset;
+}
+
+quint32 Register::getCurrentOffset() const
+{
+    return _offset;
+}
+
+bool Register::isUpdated()
+{
+	auto temp = _isUpdated;
+	_isUpdated = false;
+
+	return temp;
+}
+
+void Register::update()         //update single register
+{
+    auto value = 0;
+    for(auto i = 0; i < _fields.length(); i++)
+    {
+        value |= _fields[i]->getRegisterWriteValue();
+    }
+
+    _device->device.writeWord(_bar, _offset, value);
+}
+
+void Register::upadteArray()    //update array register
+{
+    for(quint32 i = 0; i < _arrayLength; i++)
+    {
+//        prepareData(i);
+
+        auto value = 0;
+        for(auto j = 0; j < _fields.length(); j++)
+        {
+            value |= _fields[j]->getRegisterWriteValue();
+        }
+
+        _device->device.writeWord(_bar, _offset + i*4, value);
+    }
+}
+
+void Register::sync()
+{
+    auto value = _device->device.readWord(_bar, _offset);
+    for(auto i = 0; i < _fields.length(); i++)
+    {
+        _fields[i]->updateValue(value);
+    }
+}
+
+
+void Register::syncArray()
+{
+    for(quint32 i = 0; i < _arrayLength; i++)
+    {
+        auto value = _device->device.readWord(_bar, _offset + i*4);
+        for(auto i = 0; i < _fields.length(); i++)
+        {
+            _fields[i]->updateValue(value);
+        }
+
+     //   receiveData();
+    }
+
+}

src/model/hardware/core/register/RegisterChain.cpp

@@ -0,0 +1,104 @@
+#include "model/hardware/core/register/RegisterChain.h"
+
+RegisterChain::RegisterChain(quint8 bar, quint32 offset, SonoDevice *device, quint32 arrayLength)
+{
+    _bar            = bar;
+    _offset         = offset;
+    _arrayLength    = arrayLength;
+    _device         = device;
+}
+
+RegisterChain::~RegisterChain()
+{
+    for(auto i = 0; i < _fields.length(); i++)
+    {
+        delete _fields[i];
+    }
+    _fields.clear();
+}
+
+quint32 RegisterChain::getValue()
+{
+    return _value;
+}
+
+void RegisterChain::setValue(quint32 value)
+{
+    if(_value == value)
+    {
+        return;
+    }
+
+    _value = value;
+    _isUpdated = true;
+}
+
+void RegisterChain::changeOffset(quint32 offset)
+{
+    _offset = offset;
+}
+
+quint32 RegisterChain::getCurrentOffset() const
+{
+    return _offset;
+}
+
+bool RegisterChain::isUpdated()
+{
+    auto temp = _isUpdated;
+    _isUpdated = false;
+
+    return temp;
+}
+
+void RegisterChain::update()         //update single RegisterChain
+{
+    auto value = 0;
+    for(auto i = 0; i < _fields.length(); i++)
+    {
+        value |= _fields[i]->getRegisterWriteValue();
+    }
+
+    _device->device.writeWord(_bar, _offset, value);
+}
+
+void RegisterChain::upadteArray()    //update array RegisterChain
+{
+    for(quint32 i = 0; i < _arrayLength; i++)
+    {
+        prepareData(i);
+
+        auto value = 0;
+        for(auto j = 0; j < _fields.length(); j++)
+        {
+            value |= _fields[j]->getRegisterWriteValue();
+        }
+
+        _device->device.writeWord(_bar, _offset + i*4, value);
+    }
+}
+
+void RegisterChain::sync()
+{
+    auto value = _device->device.readWord(_bar, _offset);
+    for(auto i = 0; i < _fields.length(); i++)
+    {
+        _fields[i]->updateValue(value);
+    }
+}
+
+
+void RegisterChain::syncArray()
+{
+    for(quint32 i = 0; i < _arrayLength; i++)
+    {
+        auto value = _device->device.readWord(_bar, _offset + i*4);
+        for(auto i = 0; i < _fields.length(); i++)
+        {
+            _fields[i]->updateValue(value);
+        }
+
+        //receiveData();
+    }
+
+}