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@ -1,5 +1,16 @@ |
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#include "model/hardware/core/TrxBoard.h" |
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template<class T> |
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T byteArray2UintLittleEndian(QByteArray& byte) |
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{ |
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T data; |
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QDataStream in (byte); |
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in.setByteOrder(QDataStream::LittleEndian); |
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in >> data; |
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return data; |
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} |
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void TrxBoard::readData() |
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{ |
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_swCounter = 0; |
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@ -36,6 +47,16 @@ void TrxBoard::readData() |
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} |
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} |
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void TrxBoard::sram_clear() |
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{ |
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quint32 num(0); |
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while (num < SRAM_SIZE) |
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{ |
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this->_device.device.writeLong(BAR_SRAM, static_cast<quint32>(num), 0); |
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num += sizeof (quint64); |
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} |
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} |
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void TrxBoard::scenParamsFilling(TrxBoard::eScenParams cmd) |
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{ |
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static quint8 scenParams = 0; |
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@ -183,6 +204,7 @@ void TrxBoard::init() |
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{ |
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this->_device.init(); |
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this->_bCtrlMngt->prbCtrlInit(); |
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sram_clear(); |
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} |
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void TrxBoard::setScenario(ScenGenHardwareOutput_t scenGenHw) |
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@ -449,7 +471,7 @@ void TrxBoard::setScenario (ScenGenHardwareOutput* scenParams) |
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{ |
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throw SonoException( |
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"The scenario end index must be greater than or equal to the scenario start index"); |
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} |
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} |
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} |
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void TrxBoard::setLineFilterCoefficient(QVector<float>& lineFilterLut) |
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@ -483,7 +505,7 @@ void TrxBoard::setMetaData(const QByteArray metaData) const |
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temp.append(metaData[j+num]); |
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} |
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data.push_back(byteArray2UintBigEndian <quint64>(temp)); |
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data.push_back(byteArray2UintLittleEndian <quint64>(temp)); |
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temp.clear(); |
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num += sizeof (quint64); |
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} |
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@ -519,6 +541,7 @@ QList<quint32> TrxBoard::getAfeReg(eSlaveSelect sel, quint32 afeRegAddr) |
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offset = (_fpgaOffset.at(slave0) + _afeModuleOffset.at(i) + afeRegAddr) * 4; |
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afeRegValue.push_back(this->_device.device.readWord(BAR_REG, offset)); |
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} |
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this->_afeSlave0->setReadRegEnable(false); |
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break; |
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case slave1 : |
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@ -528,6 +551,7 @@ QList<quint32> TrxBoard::getAfeReg(eSlaveSelect sel, quint32 afeRegAddr) |
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offset = (_fpgaOffset.at(slave1) + _afeModuleOffset.at(i) + afeRegAddr) * 4; |
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afeRegValue.push_back(this->_device.device.readWord(BAR_REG, offset)); |
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} |
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this->_afeSlave1->setReadRegEnable(false); |
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break; |
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case slave2 : |
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@ -537,13 +561,10 @@ QList<quint32> TrxBoard::getAfeReg(eSlaveSelect sel, quint32 afeRegAddr) |
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offset = (_fpgaOffset.at(slave2) + _afeModuleOffset.at(i) + afeRegAddr) * 4; |
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afeRegValue.push_back(this->_device.device.readWord(BAR_REG, offset)); |
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} |
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this->_afeSlave2->setReadRegEnable(false); |
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break; |
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} |
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this->_afeSlave0->setReadRegEnable(false); |
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this->_afeSlave1->setReadRegEnable(false); |
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this->_afeSlave2->setReadRegEnable(false); |
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return afeRegValue; |
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} |
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@ -667,7 +688,7 @@ void TrxBoard::fillRam(QString path) |
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temp.append(sramData[j+num]); |
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} |
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this->_device.device.writeLong(BAR_SRAM, static_cast<quint32>(num), byteArray2UintBigEndian <quint64>(temp)); |
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this->_device.device.writeLong(BAR_SRAM, static_cast<quint32>(num), byteArray2UintLittleEndian <quint64>(temp)); |
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temp.clear(); |
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num += sizeof (quint64); |
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} |
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@ -958,5 +979,10 @@ void TrxBoard::getTrxStatus(StatusVec* status) const |
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void TrxBoard::getFpgasCodeVersion(FpgaCodeVersion* version) const |
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{ |
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this->_misc->getFpgaVersion(version); |
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this->_misc->getFpgaVersion(version); |
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} |
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void TrxBoard::sramParityClear() |
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{ |
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this->_device.device.writeLong(BAR_SRAM, 0, 0); |
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} |
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