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294 lines
12 KiB
294 lines
12 KiB
3 years ago
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#ifndef __PLX_IOCTL_H
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#define __PLX_IOCTL_H
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/*******************************************************************************
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* Copyright 2013-2016 Avago Technologies
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* Copyright (c) 2009 to 2012 PLX Technology Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directorY of this source tree, or the
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* BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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******************************************************************************/
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/******************************************************************************
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*
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* File Name:
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*
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* PlxIoctl.h
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*
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* Description:
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*
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* This file contains the common I/O Control messages shared between
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* the driver and the PCI API.
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*
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* Revision History:
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*
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* 09-01-19 : PCI/PCIe SDK v8.10
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*
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******************************************************************************/
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#include "PlxTypes.h"
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#if defined(PLX_MSWINDOWS) && !defined(PLX_DRIVER)
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#include <winioctl.h>
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#elif defined(PLX_LINUX)
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/ioctl.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Set structure packing for consistentcy in kernel/user levels & save current
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#pragma pack( push, 4 )
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// Used to pass IOCTL arguments down to the driver
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typedef struct _PLX_PARAMS
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{
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PLX_STATUS ReturnCode; // API status code
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PLX_DEVICE_KEY Key; // Device key information
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U64 value[3]; // Generic storage for parameters
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union
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{
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U64 ExData[5];
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PLX_INTERRUPT PlxIntr;
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PLX_PHYSICAL_MEM PciMemory;
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PLX_PORT_PROP PortProp;
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PLX_PCI_BAR_PROP BarProp;
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PLX_DMA_PROP DmaProp;
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PLX_DMA_PARAMS TxParams;
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PLX_DRIVER_PROP DriverProp;
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PLX_MULTI_HOST_PROP MH_Prop;
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PEX_SPI_OBJ SpiProp;
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} u;
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} PLX_PARAMS;
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#if defined(PLX_MSWINDOWS)
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/**********************************************************
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* Note: Codes 0-2047 (0-7FFh) are reserved by Microsoft
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* Coded 2048-4095 (800h-FFFh) are reserved for OEMs
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*********************************************************/
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#define PLX_IOCTL_CODE_BASE 0x800
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#define IOCTL_MSG( code ) CTL_CODE( \
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FILE_DEVICE_UNKNOWN, \
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code, \
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METHOD_BUFFERED, \
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FILE_ANY_ACCESS \
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)
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#elif defined(PLX_LINUX) || defined(PLX_LINUX_DRIVER)
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#define PLX_IOCTL_CODE_BASE 0x0
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#define PLX_MAGIC 'P'
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#define IOCTL_MSG( code ) _IOWR( \
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PLX_MAGIC, \
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code, \
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PLX_PARAMS \
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)
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#elif defined(PLX_DOS)
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#define PLX_IOCTL_CODE_BASE 0x0
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#define IOCTL_MSG( code ) code
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#endif
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typedef enum _DRIVER_MSGS
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{
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MSG_DRIVER_VERSION = PLX_IOCTL_CODE_BASE,
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MSG_DRIVER_PROPERTIES,
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MSG_DRIVER_SCHEDULE_RESCAN,
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MSG_CHIP_TYPE_GET,
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MSG_CHIP_TYPE_SET,
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MSG_GET_PORT_PROPERTIES,
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MSG_PCI_DEVICE_RESET,
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MSG_PCI_DEVICE_FIND,
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MSG_PCI_BAR_PROPERTIES,
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MSG_PCI_BAR_MAP,
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MSG_PCI_BAR_UNMAP,
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MSG_PCI_REGISTER_READ,
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MSG_PCI_REGISTER_WRITE,
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MSG_PCI_REG_READ_BYPASS_OS,
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MSG_PCI_REG_WRITE_BYPASS_OS,
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MSG_REGISTER_READ,
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MSG_REGISTER_WRITE,
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MSG_MAPPED_REGISTER_READ,
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MSG_MAPPED_REGISTER_WRITE,
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MSG_PHYSICAL_MEM_ALLOCATE,
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MSG_PHYSICAL_MEM_FREE,
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MSG_PHYSICAL_MEM_MAP,
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MSG_PHYSICAL_MEM_UNMAP,
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MSG_COMMON_BUFFER_PROPERTIES,
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MSG_IO_PORT_READ,
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MSG_IO_PORT_WRITE,
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MSG_PCI_BAR_SPACE_READ,
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MSG_PCI_BAR_SPACE_WRITE,
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MSG_VPD_READ,
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MSG_VPD_WRITE,
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MSG_EEPROM_PRESENT,
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MSG_EEPROM_PROBE,
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MSG_EEPROM_GET_ADDRESS_WIDTH,
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MSG_EEPROM_SET_ADDRESS_WIDTH,
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MSG_EEPROM_CRC_GET,
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MSG_EEPROM_CRC_UPDATE,
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MSG_EEPROM_READ_BY_OFFSET,
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MSG_EEPROM_WRITE_BY_OFFSET,
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MSG_EEPROM_READ_BY_OFFSET_16,
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MSG_EEPROM_WRITE_BY_OFFSET_16,
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MSG_MAILBOX_READ,
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MSG_MAILBOX_WRITE,
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MSG_INTR_ENABLE,
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MSG_INTR_DISABLE,
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MSG_INTR_STATUS_GET,
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MSG_NOTIFICATION_REGISTER_FOR,
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MSG_NOTIFICATION_CANCEL,
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MSG_NOTIFICATION_WAIT,
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MSG_NOTIFICATION_STATUS,
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MSG_DMA_CHANNEL_OPEN,
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MSG_DMA_GET_PROPERTIES,
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MSG_DMA_SET_PROPERTIES,
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MSG_DMA_CONTROL,
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MSG_DMA_STATUS,
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MSG_DMA_TRANSFER_BLOCK,
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MSG_DMA_TRANSFER_USER_BUFFER,
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MSG_DMA_CHANNEL_CLOSE,
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MSG_PERFORMANCE_INIT_PROPERTIES,
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MSG_PERFORMANCE_MONITOR_CTRL,
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MSG_PERFORMANCE_RESET_COUNTERS,
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MSG_PERFORMANCE_GET_COUNTERS,
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MSG_MH_GET_PROPERTIES,
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MSG_MH_MIGRATE_DS_PORTS,
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MSG_NT_PROBE_REQ_ID,
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MSG_NT_LUT_PROPERTIES,
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MSG_NT_LUT_ADD,
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MSG_NT_LUT_DISABLE
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} DRIVER_MSGS;
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#define PLX_IOCTL_DRIVER_VERSION IOCTL_MSG( MSG_DRIVER_VERSION )
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#define PLX_IOCTL_DRIVER_PROPERTIES IOCTL_MSG( MSG_DRIVER_PROPERTIES )
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#define PLX_IOCTL_DRIVER_SCHEDULE_RESCAN IOCTL_MSG( MSG_DRIVER_SCHEDULE_RESCAN )
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#define PLX_IOCTL_CHIP_TYPE_GET IOCTL_MSG( MSG_CHIP_TYPE_GET )
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#define PLX_IOCTL_CHIP_TYPE_SET IOCTL_MSG( MSG_CHIP_TYPE_SET )
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#define PLX_IOCTL_GET_PORT_PROPERTIES IOCTL_MSG( MSG_GET_PORT_PROPERTIES )
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#define PLX_IOCTL_PCI_DEVICE_FIND IOCTL_MSG( MSG_PCI_DEVICE_FIND )
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#define PLX_IOCTL_PCI_DEVICE_RESET IOCTL_MSG( MSG_PCI_DEVICE_RESET )
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#define PLX_IOCTL_PCI_BAR_PROPERTIES IOCTL_MSG( MSG_PCI_BAR_PROPERTIES )
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#define PLX_IOCTL_PCI_BAR_MAP IOCTL_MSG( MSG_PCI_BAR_MAP )
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#define PLX_IOCTL_PCI_BAR_UNMAP IOCTL_MSG( MSG_PCI_BAR_UNMAP )
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#define PLX_IOCTL_PCI_REGISTER_READ IOCTL_MSG( MSG_PCI_REGISTER_READ )
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#define PLX_IOCTL_PCI_REGISTER_WRITE IOCTL_MSG( MSG_PCI_REGISTER_WRITE )
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#define PLX_IOCTL_PCI_REG_READ_BYPASS_OS IOCTL_MSG( MSG_PCI_REG_READ_BYPASS_OS )
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#define PLX_IOCTL_PCI_REG_WRITE_BYPASS_OS IOCTL_MSG( MSG_PCI_REG_WRITE_BYPASS_OS )
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#define PLX_IOCTL_REGISTER_READ IOCTL_MSG( MSG_REGISTER_READ )
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#define PLX_IOCTL_REGISTER_WRITE IOCTL_MSG( MSG_REGISTER_WRITE )
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#define PLX_IOCTL_MAPPED_REGISTER_READ IOCTL_MSG( MSG_MAPPED_REGISTER_READ )
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#define PLX_IOCTL_MAPPED_REGISTER_WRITE IOCTL_MSG( MSG_MAPPED_REGISTER_WRITE )
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#define PLX_IOCTL_MAILBOX_READ IOCTL_MSG( MSG_MAILBOX_READ )
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#define PLX_IOCTL_MAILBOX_WRITE IOCTL_MSG( MSG_MAILBOX_WRITE )
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#define PLX_IOCTL_PHYSICAL_MEM_ALLOCATE IOCTL_MSG( MSG_PHYSICAL_MEM_ALLOCATE )
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#define PLX_IOCTL_PHYSICAL_MEM_FREE IOCTL_MSG( MSG_PHYSICAL_MEM_FREE )
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#define PLX_IOCTL_PHYSICAL_MEM_MAP IOCTL_MSG( MSG_PHYSICAL_MEM_MAP )
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#define PLX_IOCTL_PHYSICAL_MEM_UNMAP IOCTL_MSG( MSG_PHYSICAL_MEM_UNMAP )
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#define PLX_IOCTL_COMMON_BUFFER_PROPERTIES IOCTL_MSG( MSG_COMMON_BUFFER_PROPERTIES )
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#define PLX_IOCTL_IO_PORT_READ IOCTL_MSG( MSG_IO_PORT_READ )
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#define PLX_IOCTL_IO_PORT_WRITE IOCTL_MSG( MSG_IO_PORT_WRITE )
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#define PLX_IOCTL_PCI_BAR_SPACE_READ IOCTL_MSG( MSG_PCI_BAR_SPACE_READ )
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#define PLX_IOCTL_PCI_BAR_SPACE_WRITE IOCTL_MSG( MSG_PCI_BAR_SPACE_WRITE )
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#define PLX_IOCTL_VPD_READ IOCTL_MSG( MSG_VPD_READ )
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#define PLX_IOCTL_VPD_WRITE IOCTL_MSG( MSG_VPD_WRITE )
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#define PLX_IOCTL_EEPROM_PRESENT IOCTL_MSG( MSG_EEPROM_PRESENT )
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#define PLX_IOCTL_EEPROM_PROBE IOCTL_MSG( MSG_EEPROM_PROBE )
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#define PLX_IOCTL_EEPROM_GET_ADDRESS_WIDTH IOCTL_MSG( MSG_EEPROM_GET_ADDRESS_WIDTH )
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#define PLX_IOCTL_EEPROM_SET_ADDRESS_WIDTH IOCTL_MSG( MSG_EEPROM_SET_ADDRESS_WIDTH )
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#define PLX_IOCTL_EEPROM_CRC_GET IOCTL_MSG( MSG_EEPROM_CRC_GET )
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#define PLX_IOCTL_EEPROM_CRC_UPDATE IOCTL_MSG( MSG_EEPROM_CRC_UPDATE )
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#define PLX_IOCTL_EEPROM_READ_BY_OFFSET IOCTL_MSG( MSG_EEPROM_READ_BY_OFFSET )
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#define PLX_IOCTL_EEPROM_WRITE_BY_OFFSET IOCTL_MSG( MSG_EEPROM_WRITE_BY_OFFSET )
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#define PLX_IOCTL_EEPROM_READ_BY_OFFSET_16 IOCTL_MSG( MSG_EEPROM_READ_BY_OFFSET_16 )
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#define PLX_IOCTL_EEPROM_WRITE_BY_OFFSET_16 IOCTL_MSG( MSG_EEPROM_WRITE_BY_OFFSET_16 )
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#define PLX_IOCTL_INTR_ENABLE IOCTL_MSG( MSG_INTR_ENABLE )
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#define PLX_IOCTL_INTR_DISABLE IOCTL_MSG( MSG_INTR_DISABLE )
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#define PLX_IOCTL_INTR_STATUS_GET IOCTL_MSG( MSG_INTR_STATUS_GET )
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#define PLX_IOCTL_NOTIFICATION_REGISTER_FOR IOCTL_MSG( MSG_NOTIFICATION_REGISTER_FOR )
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#define PLX_IOCTL_NOTIFICATION_CANCEL IOCTL_MSG( MSG_NOTIFICATION_CANCEL )
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#define PLX_IOCTL_NOTIFICATION_WAIT IOCTL_MSG( MSG_NOTIFICATION_WAIT )
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#define PLX_IOCTL_NOTIFICATION_STATUS IOCTL_MSG( MSG_NOTIFICATION_STATUS )
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#define PLX_IOCTL_DMA_CHANNEL_OPEN IOCTL_MSG( MSG_DMA_CHANNEL_OPEN )
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#define PLX_IOCTL_DMA_GET_PROPERTIES IOCTL_MSG( MSG_DMA_GET_PROPERTIES )
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#define PLX_IOCTL_DMA_SET_PROPERTIES IOCTL_MSG( MSG_DMA_SET_PROPERTIES )
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#define PLX_IOCTL_DMA_CONTROL IOCTL_MSG( MSG_DMA_CONTROL )
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#define PLX_IOCTL_DMA_STATUS IOCTL_MSG( MSG_DMA_STATUS )
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#define PLX_IOCTL_DMA_TRANSFER_BLOCK IOCTL_MSG( MSG_DMA_TRANSFER_BLOCK )
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#define PLX_IOCTL_DMA_TRANSFER_USER_BUFFER IOCTL_MSG( MSG_DMA_TRANSFER_USER_BUFFER )
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#define PLX_IOCTL_DMA_CHANNEL_CLOSE IOCTL_MSG( MSG_DMA_CHANNEL_CLOSE )
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#define PLX_IOCTL_PERFORMANCE_INIT_PROPERTIES IOCTL_MSG( MSG_PERFORMANCE_INIT_PROPERTIES )
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#define PLX_IOCTL_PERFORMANCE_MONITOR_CTRL IOCTL_MSG( MSG_PERFORMANCE_MONITOR_CTRL )
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#define PLX_IOCTL_PERFORMANCE_RESET_COUNTERS IOCTL_MSG( MSG_PERFORMANCE_RESET_COUNTERS )
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#define PLX_IOCTL_PERFORMANCE_GET_COUNTERS IOCTL_MSG( MSG_PERFORMANCE_GET_COUNTERS )
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#define PLX_IOCTL_MH_GET_PROPERTIES IOCTL_MSG( MSG_MH_GET_PROPERTIES )
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#define PLX_IOCTL_MH_MIGRATE_DS_PORTS IOCTL_MSG( MSG_MH_MIGRATE_DS_PORTS )
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#define PLX_IOCTL_NT_PROBE_REQ_ID IOCTL_MSG( MSG_NT_PROBE_REQ_ID )
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#define PLX_IOCTL_NT_LUT_PROPERTIES IOCTL_MSG( MSG_NT_LUT_PROPERTIES )
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#define PLX_IOCTL_NT_LUT_ADD IOCTL_MSG( MSG_NT_LUT_ADD )
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#define PLX_IOCTL_NT_LUT_DISABLE IOCTL_MSG( MSG_NT_LUT_DISABLE )
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// Restore previous pack value
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#pragma pack( pop )
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#ifdef __cplusplus
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}
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#endif
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#endif
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